Daniel Dunbar
ee525943d8
tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses instead of just one.
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llvm-svn: 104452
2010-05-22 21:02:29 +00:00
Daniel Dunbar
64807873ec
tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor
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it.
llvm-svn: 104270
2010-05-20 20:20:32 +00:00
Daniel Dunbar
1c27a3b79d
lit: Add another place to look for bash.
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llvm-svn: 104189
2010-05-19 23:56:09 +00:00
Alexis Hunt
0774d14741
Replace FIRST_* and LAST_* macros with a generic STMT_RANGE macro
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Also rename ABSTRACT to ABSTRACT_STMT
llvm-svn: 104018
2010-05-18 06:22:50 +00:00
Evan Cheng
2af2c9fa14
Added a QQQQ register file to model 4-consecutive Q registers.
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llvm-svn: 103760
2010-05-14 02:13:41 +00:00
Evan Cheng
775549c9e7
Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.
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llvm-svn: 103746
2010-05-13 23:55:47 +00:00
Chandler Carruth
d37bcf5e2c
Update tablegen to generate shorts instead of chars for subgroup arrays.
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llvm-svn: 103704
2010-05-13 07:43:47 +00:00
Daniel Dunbar
8578537b17
lit: Fix a sh lexing bug which caused annotate-token.m to fail when run with the
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internal shell parser; we weren't lexing the quotes in a command like::
clang -DFOO='hello'
correctly.
llvm-svn: 103652
2010-05-12 21:47:58 +00:00
Daniel Dunbar
8c1208781d
lit: Fix OneCommandPerFileTest format when tests are specified directly.
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llvm-svn: 103626
2010-05-12 17:56:44 +00:00
Daniel Dunbar
cab93afa90
lit: Add support for 'lit ... @foo', which reads a list of tests to run from
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foo.
llvm-svn: 103625
2010-05-12 17:56:42 +00:00
Dan Gohman
03e407ed83
Add initial kill flag support to FastISel.
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llvm-svn: 103529
2010-05-11 23:54:07 +00:00
Douglas Gregor
2f2491405a
Fixes for Microsoft Visual Studio 2010, from Steven Watanabe!
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llvm-svn: 103457
2010-05-11 06:17:44 +00:00
Sean Callanan
4331428e24
Eliminated the classification of control registers into %ecr_
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and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.
llvm-svn: 103196
2010-05-06 20:59:00 +00:00
Dan Gohman
497e752655
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
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doesn't have to guess.
llvm-svn: 103194
2010-05-06 20:33:48 +00:00
Evan Cheng
4c3022f869
Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coalescer bug that's fixed by 103170.
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llvm-svn: 103172
2010-05-06 06:36:08 +00:00
Alexis Hunt
24902a84b1
Fix some stylistic issues with my last commit.
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llvm-svn: 103164
2010-05-06 05:24:38 +00:00
Bob Wilson
5ee6d0b151
Select an ARM-hosted cross build with a separate makefile target instead of
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a magic project name.
llvm-svn: 103125
2010-05-05 22:22:40 +00:00
Jeffrey Yasskin
421cf94ea0
Rearrange the suppressions files to be by-architecture instead of by-problem.
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ddunbar says the gcc-4.3.3 suppressions are obsolete.
llvm-svn: 103106
2010-05-05 18:39:16 +00:00
Jeffrey Yasskin
be201cecc8
Add a suppressions file for an intermittent "leak" under RegisterPass.
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llvm-svn: 103100
2010-05-05 18:15:26 +00:00
Daniel Dunbar
772b9002e7
lit: Allow test_format to be None.
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llvm-svn: 103091
2010-05-05 17:22:35 +00:00
Shantonu Sen
7e52958e05
Add newline to end of file to avoid warning
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when building llvm with clang
llvm-svn: 103084
2010-05-05 13:56:46 +00:00
Alexis Hunt
f4d5520f79
Include the right header for toupper
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llvm-svn: 103073
2010-05-05 04:31:44 +00:00
Alexis Hunt
55ae7d6b53
Add an emitter to handle the list of clang statement nodes.
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llvm-svn: 103071
2010-05-05 04:13:08 +00:00
Chris Lattner
7b17b0d5fb
add the ability to associate 'category' names with clang diagnostics
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and diagnostic groups. This allows the compiler to group
diagnostics together (e.g. "Logic Warning",
"Format String Warning", etc) like the static analyzer does.
This is not exposed through anything in the compiler yet.
llvm-svn: 103050
2010-05-04 20:44:23 +00:00
Daniel Dunbar
711d2427dd
MC/Matcher: Add support for over-riding the default MatchInstruction function
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name (for example, to allow targets to interpose the actual MatchInstruction
function).
llvm-svn: 102987
2010-05-04 00:33:13 +00:00
Dan Gohman
cc176c4b1f
Add a polygen rule that reflects the fact that nsw and nuw can be
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used together in either order.
llvm-svn: 102983
2010-05-04 00:13:24 +00:00
Bob Wilson
5010005c87
Remove special case for llvmCore_Embedded project. This is no longer needed
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since llvmCore is built as part of llvmgcc42 now.
llvm-svn: 102962
2010-05-03 21:41:24 +00:00
Evan Cheng
8bd004b033
Add a pseudo instruction REG_SEQUENCE that takes a list of registers and
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sub-register indices and outputs a single super register which is formed from
a consecutive sequence of registers.
This is used as register allocation / coalescing aid and it is useful to
represent instructions that output register pairs / quads. For example,
v1024, v1025 = vload <address>
where v1024 and v1025 forms a register pair.
This really should be modelled as
v1024<3>, v1025<4> = vload <address>
but it would violate SSA property before register allocation is done.
Currently we use insert_subreg to form the super register:
v1026 = implicit_def
v1027 - insert_subreg v1026, v1024, 3
v1028 = insert_subreg v1027, v1025, 4
...
= use v1024
= use v1028
But this adds pseudo live interval overlap between v1024 and v1025.
We can now modeled it as
v1024, v1025 = vload <address>
v1026 = REG_SEQUENCE v1024, 3, v1025, 4
...
= use v1024
= use v1026
After coalescing, it will be
v1026<3>, v1025<4> = vload <address>
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= use v1026<3>
= use v1026
llvm-svn: 102815
2010-05-01 00:28:44 +00:00
Bob Wilson
1576577ead
Don't remove libLTO.dylib if it's not being installed in Developer/usr/lib;
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just leave it in Developer/usr/local/lib.
llvm-svn: 102646
2010-04-29 18:04:29 +00:00
Bob Wilson
ed156c2212
Add an option to the Apple-style build to control whether libLTO.dylib should
...
be installed. Disable it by default.
llvm-svn: 102531
2010-04-28 21:08:01 +00:00
Bob Wilson
98f2186636
Undo most of my previous whitespace fix. I think I like it better this way
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after all.
llvm-svn: 102508
2010-04-28 18:18:36 +00:00
Bob Wilson
ba5b622a80
Fix inconsistent use of HOSTS and TARGETS variables.
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llvm-svn: 102505
2010-04-28 18:06:27 +00:00
Bob Wilson
07f7b3462e
Fix whitespace.
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llvm-svn: 102504
2010-04-28 17:50:03 +00:00
Sean Callanan
72d3d36188
Fixes to edis that mark x86 call targets as
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memory operands rather than immediate operands.
llvm-svn: 102217
2010-04-23 22:17:17 +00:00
Johnny Chen
9998480f92
When doing Thumb disassembly, there's no need to consider t2ADDrSPi12/t2SUBrSPi12,
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as their generic counterparts t2ADDri12/t2SUBri12 should suffice.
llvm-svn: 101929
2010-04-20 18:45:24 +00:00
Chris Lattner
6a517dbbd6
stop computing InstImpInputs, it is dead
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llvm-svn: 101881
2010-04-20 06:30:25 +00:00
Chris Lattner
8b5bae8c3c
DAGInstruction::ImpOperands is dead after my recent tblgen work, zap it.
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llvm-svn: 101880
2010-04-20 06:28:43 +00:00
Anton Korobeynikov
e325c693a5
Make processor FUs unique for given itinerary. This extends the limit of 32
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FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.
llvm-svn: 101754
2010-04-18 20:31:01 +00:00
Chris Lattner
9d12c8bb70
silence some -Wmissing-field-initializers warnings.
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llvm-svn: 101690
2010-04-18 03:30:32 +00:00
Dan Gohman
d48633d340
Fix a bunch of namespace polution.
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llvm-svn: 101376
2010-04-15 17:08:50 +00:00
Daniel Dunbar
3bf3e0e63a
Remove unnecessary uses of <iostream>.
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llvm-svn: 101338
2010-04-15 03:47:24 +00:00
Benjamin Kramer
84265367be
EDis: Don't include inttypes.h. We support compilers which don't provide it. It was unused anyways.
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llvm-svn: 101241
2010-04-14 13:56:38 +00:00
Daniel Dunbar
d3c1f99fa1
Fix -Asserts warnings.
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llvm-svn: 101191
2010-04-13 23:34:11 +00:00
Sean Callanan
29a7152676
Fixed a nasty layering violation in the edis source
...
code. It used to #include the enhanced disassembly
information for the targets it supported straight
out of lib/Target/{X86,ARM,...} but now it uses a
new interface provided by MCDisassembler, and (so
far) implemented by X86 and ARM.
Also removed hacky #define-controlled initialization
of targets in edis. If clients only want edis to
initialize a limited set of targets, they can set
--enable-targets on the configure command line.
llvm-svn: 101179
2010-04-13 21:21:57 +00:00
Johnny Chen
b6b7028930
If all the bit positions are not specified; do not decode the instructions.
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We are bound to fail! For proper disassembly, the well-known encoding bits
of the instruction must be fully specified.
This also removes pseudo instructions from considerations of disassembly,
which is a better design and less fragile than the name matchings.
llvm-svn: 100899
2010-04-09 21:01:02 +00:00
Chris Lattner
9d77e5ba47
add minix support, patch by Kees van Reeuwijk! PR6797
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llvm-svn: 100895
2010-04-09 20:45:04 +00:00
Bob Wilson
ef934eac9f
Provide versions of the ARM eh_sjlj_setjmp instructions for non-VFP subtargets
...
such that the non-VFP versions have no implicit defs of VFP registers.
If any callee-saved VFP registers are marked as having been defined, the
prologue/epilogue code will try to save and restore them.
Radar 7770432.
llvm-svn: 100892
2010-04-09 20:41:18 +00:00
Johnny Chen
c531a30631
ARM decoder emitter should print out useful information unconditionally when it
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encounters decoding conflicts, instead of wrapping it inside the DEBUG() macro.
llvm-svn: 100886
2010-04-09 19:31:33 +00:00
Daniel Dunbar
4ddbf8ad2c
lit: Add support to OneCommandPerFileTest format to take input directory from input path.
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llvm-svn: 100846
2010-04-09 02:15:10 +00:00
Johnny Chen
43b072e18d
Now that Evan Cheng has fixed the coalescer bug (r100804), the workaround code
...
to avoid memcpy() call is no longer necessary.
llvm-svn: 100811
2010-04-08 21:23:54 +00:00