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Author SHA1 Message Date
Owen Anderson
ec9ec036a4 Add an initialization routine for libLLVMipo.a 
llvm-svn: 115933
 2010-10-07 18:09:59 +00:00
Owen Anderson
f7f45af8ae Add a header that I forgot to commit. 
llvm-svn: 115932
 2010-10-07 18:05:11 +00:00
Jakob Stoklund Olesen
9f106fa05c Cache interval iterators in SplitEditor::addTruncSimpleRange so we only have to 
do one find().

llvm-svn: 115929
 2010-10-07 17:56:39 +00:00
Jakob Stoklund Olesen
a8b45e7477 Clean up debug printing. 
llvm-svn: 115928
 2010-10-07 17:56:35 +00:00
Owen Anderson
4a9acfa34a Next step on the getting-rid-of-static-ctors train: begin adding per-library 
initialization functions that initialize the set of passes implemented in
that library.  Add C bindings for these functions as well.

llvm-svn: 115927
 2010-10-07 17:55:47 +00:00
Owen Anderson
ab71dcd0ad Fix a warning when building with clang++. 
llvm-svn: 115924
 2010-10-07 17:04:18 +00:00
Jim Grosbach
04523be385 trailing whitespace 
llvm-svn: 115923
 2010-10-07 16:56:28 +00:00
Kalle Raiskila
4e70866424 Add the missing cases to the type->registerclass conversion function. 
llvm-svn: 115921
 2010-10-07 16:32:42 +00:00
Kalle Raiskila
dad4c84edf Implement two virtual functions in SPUTargetLowering. 
Before the implementation of isLegalAddressingMode, some rare cases 
of code were miscompiled if optimized with the LoopStrengthReduce pass.
It is unclear (to me) if LSR is "allowed" to produce wrong code with a 
bad TargetLowering, or if the bug is elsewhere and this patch just 
hides it.

llvm-svn: 115919
 2010-10-07 16:24:35 +00:00
NAKAMURA Takumi
4568ebde72 Minor cosmetic change: fix DOSish \r\n. 
llvm-svn: 115910
 2010-10-07 07:21:04 +00:00
Michael J. Spencer
85094f7689 MC-COFF: Fix symbol aliases. Fixes PR8251. 
llvm-svn: 115909
 2010-10-07 06:29:33 +00:00
Michael J. Spencer
b6c9623247 test: Fix binary stdin issues with coff-dump on Windows. 
llvm-svn: 115908
 2010-10-07 06:29:21 +00:00
Eric Christopher
3a068c4252 Use the correct register class for load instructions - fixes 
compilation of MultiSource/Benchmarks/Bullet.

llvm-svn: 115907
 2010-10-07 05:50:44 +00:00
Eric Christopher
b3e9588644 Use the correct register class here. 
llvm-svn: 115906
 2010-10-07 05:39:19 +00:00
Eric Christopher
67ca7a8fe3 Use the thumb2 conditional move instruction. 
llvm-svn: 115905
 2010-10-07 05:31:49 +00:00
Eric Christopher
8b8bce9a5b Remove in-progress assertion, add TODO. 
llvm-svn: 115904
 2010-10-07 05:14:08 +00:00
Owen Anderson
88fd2662d2 Add the header that I accidentally forgot from r115900. 
llvm-svn: 115901
 2010-10-07 04:17:38 +00:00
Owen Anderson
a8a7bf484f Move the pass initialization helper functions into the llvm namespace, and add 
a header declaring them all.  This is also where we will declare per-library pass-set
initializer functions down the road.

llvm-svn: 115900
 2010-10-07 04:13:08 +00:00
Evan Cheng
1ce29574c2 Model operand cycles of vldm / vstm; also fixes scheduling itineraries of vldr / vstr, etc. 
llvm-svn: 115898
 2010-10-07 01:50:48 +00:00
Chris Lattner
f0d9834e08 add support for isConvertibleToThreeAddress to ArithBinOpEFLAGS, 
allowing us to convert ADD over.  deletes 160 lines of .td file.

llvm-svn: 115897
 2010-10-07 01:37:01 +00:00
Chris Lattner
dea1395cfe Fix a few issues in ArithBinOpEFLAGS that made it specific to and. 
Start using ArithBinOpEFLAGS for OR, XOR, and SUB.

This removes 500 lines from the .td file.  Now AND/OR/XOR/SUB are all
defined exactly the same way instead of being close relatives.

llvm-svn: 115896
 2010-10-07 01:26:27 +00:00
Chris Lattner
f1f5df212b Convert 'and' to single instance of a multipattern 
which instantiates the 34 versions of and all in one
swoop.  The BaseOpc/BaseOpc2/BaseOpc4 stuff should not
be required, but tblgen's feeble brain explodes when I
use Or4<BaseOpc>.V in the multipattern.

No change in the generated .inc files.

llvm-svn: 115893
 2010-10-07 01:10:20 +00:00
Jim Grosbach
c0a61c0796 Allow use of the 16-bit literal move instruction in CMOVs for Thumb2 mode. 
llvm-svn: 115890
 2010-10-07 00:53:56 +00:00
Chris Lattner
a2b51bb341 add a new BinOpAI class to represent the immediate form that directly acts on EAX. 
This does change the generated .inc files to include the implicit use/def of eax.
Since these instructions are only generated by the assembler and disassembler it
doesn't actually matter though.

llvm-svn: 115885
 2010-10-07 00:43:39 +00:00
Jim Grosbach
1e2566c20d Allow use of the 16-bit literal move instruction in CMOVs for ARM mode. 
llvm-svn: 115884
 2010-10-07 00:42:42 +00:00
Chris Lattner
0df71280d1 add a bunch of classes for other common patterns. 
As usual, no change in generated .inc files.

llvm-svn: 115882
 2010-10-07 00:35:28 +00:00
Owen Anderson
3bc77c4154 Since the Hello pass is built as a loadable dynamic library, don't try to convert it to new-style registration yet. 
llvm-svn: 115881
 2010-10-07 00:31:16 +00:00
Chris Lattner
9b3a494cdb Define a new BinOpRI8 class and use it to define the imm8 versions of and. 
llvm-svn: 115880
 2010-10-07 00:12:45 +00:00
Jakob Stoklund Olesen
5e329859cd Constrain the offset register to a *_NOSP register class when inserting LEA 
instructions.

This unbreaks the machine code verifier and fixes PR8317.

llvm-svn: 115879
 2010-10-07 00:07:26 +00:00
Chris Lattner
b520abade4 add the pattern operator to match to X86TypeInfo, use this to 
convert AND64ri32 to use BinOpRI.

llvm-svn: 115878
 2010-10-07 00:01:39 +00:00
Chris Lattner
2ccb760de0 add a common SDPatternOperator base class to SDNode and PatFrag for 
stuff that wants to take one or the other.  These can both be used
as the operation of a dag in a pattern match.

llvm-svn: 115877
 2010-10-07 00:01:00 +00:00
Jakob Stoklund Olesen
8c1eafb4cb Properly handle GR32_NOSP in X86RegisterInfo::getMatchingSuperRegClass. 
This function looks like it is about ready to be generated by TebleGen.

llvm-svn: 115876
 2010-10-06 23:56:46 +00:00
Jakob Stoklund Olesen
6b4557461f Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE. 
This function is intended to be used when inserting a machine instruction that
trivially restricts the legal registers, like LEA requiring a GR32_NOSP
argument.

llvm-svn: 115875
 2010-10-06 23:54:39 +00:00
Jakob Stoklund Olesen
3ad7d4262d Skip unused registers when verifying LiveIntervals. 
llvm-svn: 115874
 2010-10-06 23:54:35 +00:00
Bill Wendling
154af563cf Fixed RELEASE_28 tags. 
llvm-svn: 115872
 2010-10-06 23:50:30 +00:00
Jim Grosbach
f2c54c9cf3 remove trailing whitespace 
llvm-svn: 115860
 2010-10-06 22:46:47 +00:00
Jason W Kim
de3044dcd1 First in a sequence of ARM/MC/*ELF* specific work. 
Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute()
Added ARMAsmPrinter::emitAttributes() (plural s).
TODO:
.cpu attribute needs to be refactored

llvm-svn: 115859
 2010-10-06 22:36:46 +00:00
Rafael Espindola
d0417ac2e1 Another case of 256 sections not being enough :-) 
llvm-svn: 115858
 2010-10-06 22:28:19 +00:00
Owen Anderson
65684877c5 Appease the clang self-host buildbot by providing a correct instantiation. 
llvm-svn: 115857
 2010-10-06 22:23:20 +00:00
Jim Grosbach
de2bd8cd3f Clean up MOVi32imm and t2MOVi32imm pseudo instruction definitions. 
llvm-svn: 115853
 2010-10-06 22:01:26 +00:00
Jim Grosbach
4c7da8acbc Kill of the vestiges of the 'call' Modifier (no longer needed for PLT). 
llvm-svn: 115845
 2010-10-06 21:36:43 +00:00
Jim Grosbach
e8a4fef4ea Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-needed 
"lane" operand modifier.

llvm-svn: 115843
 2010-10-06 21:22:32 +00:00
Jim Grosbach
04a4f7c5d9 Now that VDUPfqf and VDUPfdfare properly pseudos, nuke the special handling. 
llvm-svn: 115841
 2010-10-06 21:17:07 +00:00
Jim Grosbach
e1e07b6bf1 Change the NEON VDUPfdf and VDUPfqf pseudo-instructions to actually be 
pseudo instructions.

llvm-svn: 115840
 2010-10-06 21:16:16 +00:00
Tobias Grosser
eecbee3024 Fix libc++ link in release notes. 
llvm-svn: 115837
 2010-10-06 21:07:30 +00:00
Rafael Espindola
ed469a30f0 Get binding and visibility info from the the alias, but Type from the symbol 
being aliased.

llvm-svn: 115836
 2010-10-06 21:02:29 +00:00
Owen Anderson
2a670815f6 Hide analysis group registration behind a macro, just like pass registration. 
llvm-svn: 115835
 2010-10-06 21:02:27 +00:00
Devang Patel
eeb0b64560 Add support for DW_TAG_unspecified_parameters. 
llvm-svn: 115833
 2010-10-06 20:50:40 +00:00
Jim Grosbach
54490de165 Add a 'pattern' arg to the ARM PseudoNeonI class. 
llvm-svn: 115831
 2010-10-06 20:36:55 +00:00
Michael J. Spencer
b1c4f7b52a MC: Add missing forward in MCLoggingStreamer. 
llvm-svn: 115830
 2010-10-06 20:36:47 +00:00