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Commit Graph

31 Commits

Author SHA1 Message Date
Stuart Hastings
ef732a2bea Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
Will revert 75770 in the llvm-gcc trunk.

llvm-svn: 75799
2009-07-15 17:27:11 +00:00
Daniel Dunbar
a2af870bd7 Register Target's TargetMachine and AsmPrinter in the new registry.
- This abuses TargetMachineRegistry's constructor for now, this will get
   cleaned up in time.

llvm-svn: 75762
2009-07-15 09:22:31 +00:00
David Greene
9c8a1b9b90 Have asm printers use formatted_raw_ostream directly to avoid a
dynamic_cast<>.

llvm-svn: 75670
2009-07-14 20:18:05 +00:00
Torok Edwin
f955a6ef49 llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").

llvm-svn: 75640
2009-07-14 16:55:14 +00:00
Torok Edwin
ae8a3ff177 assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.

llvm-svn: 75379
2009-07-11 20:10:48 +00:00
Evan Cheng
24f2aefc87 Add a thumb2 pass to insert IT blocks.
llvm-svn: 75218
2009-07-10 01:54:42 +00:00
Bruno Cardoso Lopes
38373542a1 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
cleanup, removed some #includes and moved Object Code Emitter out-of-line.

llvm-svn: 74813
2009-07-06 05:09:34 +00:00
Daniel Dunbar
bc3d149e98 Remove unused AsmPrinter OptLevel argument, and propogate.
- This more or less amounts to a revert of r65379. I'm curious to know what
   happened that caused this variable to become unused.

llvm-svn: 74579
2009-07-01 01:48:54 +00:00
Anton Korobeynikov
aab56476b2 Split thumb-related stuff into separate classes.
Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo

llvm-svn: 74329
2009-06-26 21:28:53 +00:00
Evan Cheng
d0a66e438f Add a ARM specific pre-allocation pass that re-schedule loads / stores from
consecutive addresses togther. This makes it easier for the post-allocation pass
to form ldm / stm.

This is step 1. We are still missing a lot of ldm / stm opportunities because
of register allocation are not done in the desired order. More enhancements
coming.

llvm-svn: 73291
2009-06-13 09:12:55 +00:00
Bruno Cardoso Lopes
7765059062 Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray
llvm-svn: 72697
2009-06-01 19:57:37 +00:00
Bruno Cardoso Lopes
4da7e7af43 First patch in the direction of splitting MachineCodeEmitter in two subclasses:
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray

llvm-svn: 72631
2009-05-30 20:51:52 +00:00
Bill Wendling
40a162f75f Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.

llvm-svn: 70440
2009-04-29 23:29:43 +00:00
Bill Wendling
7546bed590 Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.

llvm-svn: 70343
2009-04-29 00:15:41 +00:00
Bill Wendling
ef47ace92f r70270 isn't ready yet. Back this out. Sorry for the noise.
llvm-svn: 70275
2009-04-28 01:04:53 +00:00
Bill Wendling
2799e916c3 Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...

llvm-svn: 70270
2009-04-28 00:21:31 +00:00
Evan Cheng
3a7489a4cc CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
llvm-svn: 67668
2009-03-25 01:47:28 +00:00
Bill Wendling
9d4eb136da Overhaul my earlier submission due to feedback. It's a large patch, but most of
them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
  of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
  machine function when calling "runOnMachineFunction" in the asm printers.

llvm-svn: 65379
2009-02-24 08:30:20 +00:00
Dan Gohman
8271066844 Tidy up #includes, deleting a bunch of unnecessary #includes.
llvm-svn: 61715
2009-01-05 17:59:02 +00:00
Jim Grosbach
974799922e Comment to be explicit that the enumeration values for CondCodes matter.
llvm-svn: 57295
2008-10-08 16:24:35 +00:00
Owen Anderson
2c1d54952b Use raw_ostream throughout the AsmPrinter.
llvm-svn: 55092
2008-08-21 00:14:44 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Evan Cheng
96254545ae Initial ARM JIT support by Raul Fernandes Herbster.
llvm-svn: 37926
2007-07-05 21:15:40 +00:00
Evan Cheng
c6e1d453d3 ARM backend contribution from Apple.
llvm-svn: 33353
2007-01-19 07:51:42 +00:00
Rafael Espindola
04afe6eb37 move ARMCondCodeToString to ARMAsmPrinter.cpp
remove unused variables from lowerCall

llvm-svn: 31378
2006-11-02 15:00:02 +00:00
Rafael Espindola
6c7627e002 Implement a MachineFunctionPass to fix the mul instruction
llvm-svn: 30485
2006-09-19 15:49:25 +00:00
Rafael Espindola
1a3020bfcf add shifts to addressing mode 1
llvm-svn: 30291
2006-09-13 12:09:43 +00:00
Rafael Espindola
5c0443c41e add more condition codes
llvm-svn: 30056
2006-09-02 20:24:25 +00:00
Rafael Espindola
fb63eba81c add the "eq" condition code
implement a movcond instruction

llvm-svn: 29857
2006-08-24 17:19:08 +00:00
Rafael Espindola
cf999a6d39 create a generic bcond instruction that has a conditional code argument
llvm-svn: 29856
2006-08-24 16:13:15 +00:00
Rafael Espindola
dd49dfc0df added a skeleton of the ARM backend
llvm-svn: 28301
2006-05-14 22:18:28 +00:00