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Commit Graph

116 Commits

Author SHA1 Message Date
Chris Lattner
eff6e46178 Don't lump the filename and working dir together
llvm-svn: 24697
2005-12-13 17:40:33 +00:00
Chris Lattner
b0b4e53b55 Accept and ignore prefetches for now
llvm-svn: 24678
2005-12-12 22:51:16 +00:00
Chris Lattner
a54452fd4f Minor tweak to get isel opt
llvm-svn: 24663
2005-12-11 09:05:13 +00:00
Chris Lattner
e27671119a improve code insertion in two ways:
1. Only forward subst offsets into loads and stores, not into arbitrary
   things, where it will likely become a load.
2. If the source is a cast from pointer, forward subst the cast as well,
   allowing us to fold the cast away (improving cases when the cast is
   from an alloca or global).

This hasn't been fully tested, but does appear to further reduce register
pressure and improve code.  Lets let the testers grind on it a bit. :)

llvm-svn: 24640
2005-12-08 08:00:12 +00:00
Nate Begeman
589dff9a20 Fix a crash where ConstantVec nodes were being generated with the wrong
type when the target did not support them.  Also teach Legalize how to
expand ConstantVecs.

This allows us to generate

_test:
        lwz r2, 12(r3)
        lwz r4, 8(r3)
        lwz r5, 4(r3)
        lwz r6, 0(r3)
        addi r2, r2, 4
        addi r4, r4, 3
        addi r5, r5, 2
        addi r6, r6, 1
        stw r2, 12(r3)
        stw r4, 8(r3)
        stw r5, 4(r3)
        stw r6, 0(r3)
        blr

For:

void %test(%v4i *%P) {
        %T = load %v4i* %P
        %S = add %v4i %T, <int 1, int 2, int 3, int 4>
        store %v4i %S, %v4i * %P
        ret void
}

On PowerPC.

llvm-svn: 24633
2005-12-07 19:48:11 +00:00
Nate Begeman
6c1b8712c5 Teach the SelectionDAG ISel how to turn ConstantPacked values into
constant nodes with vector types.  Also teach the asm printer how to print
ConstantPacked constant pool entries.  This allows us to generate altivec
code such as the following, which adds a vector constantto a packed float.

LCPI1_0:  <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 >
        .space  4
        .space  4
        .space  4
        .long   1065353216      ; float 1
        .text
        .align  4
        .globl  _foo
_foo:
        lis r2, ha16(LCPI1_0)
        la r2, lo16(LCPI1_0)(r2)
        li r4, 0
        lvx v0, r4, r2
        lvx v1, r4, r3
        vaddfp v0, v1, v0
        stvx v0, r4, r3
        blr

For the llvm code:

void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 >
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

llvm-svn: 24616
2005-12-06 06:18:55 +00:00
Chris Lattner
46ac4d0810 Fix the #1 code quality problem that I have seen on X86 (and it also affects
PPC and other targets).  In a particular, consider code like this:

struct Vector3 { double x, y, z; };
struct Matrix3 { Vector3 a, b, c; };
double dot(Vector3 &a, Vector3 &b) {
   return a.x * b.x  +  a.y * b.y  +  a.z * b.z;
}
Vector3 mul(Vector3 &a, Matrix3 &b) {
   Vector3 r;
   r.x = dot( a, b.a );
   r.y = dot( a, b.b );
   r.z = dot( a, b.c );
   return r;
}
void transform(Matrix3 &m, Vector3 *x, int n) {
   for (int i = 0; i < n; i++)
      x[i] = mul( x[i], m );
}

we compile transform to a loop with all of the GEP instructions for indexing
into 'm' pulled out of the loop (9 of them).  Because isel occurs a bb at a time
we are unable to fold the constant index into the loads in the loop, leading to
PPC code that looks like this:

LBB3_1: ; no_exit.preheader
        li r2, 0
        addi r6, r3, 64        ;; 9 values live across the loop body!
        addi r7, r3, 56
        addi r8, r3, 48
        addi r9, r3, 40
        addi r10, r3, 32
        addi r11, r3, 24
        addi r12, r3, 16
        addi r30, r3, 8
LBB3_2: ; no_exit
        lfd f0, 0(r30)
        lfd f1, 8(r4)
        fmul f0, f1, f0
        lfd f2, 0(r3)        ;; no constant indices folded into the loads!
        lfd f3, 0(r4)
        lfd f4, 0(r10)
        lfd f5, 0(r6)
        lfd f6, 0(r7)
        lfd f7, 0(r8)
        lfd f8, 0(r9)
        lfd f9, 0(r11)
        lfd f10, 0(r12)
        lfd f11, 16(r4)
        fmadd f0, f3, f2, f0
        fmul f2, f1, f4
        fmadd f0, f11, f10, f0
        fmadd f2, f3, f9, f2
        fmul f1, f1, f6
        stfd f0, 0(r4)
        fmadd f0, f11, f8, f2
        fmadd f1, f3, f7, f1
        stfd f0, 8(r4)
        fmadd f0, f11, f5, f1
        addi r29, r4, 24
        stfd f0, 16(r4)
        addi r2, r2, 1
        cmpw cr0, r2, r5
        or r4, r29, r29
        bne cr0, LBB3_2 ; no_exit

uh, yuck.  With this patch, we now sink the constant offsets into the loop, producing
this code:

LBB3_1: ; no_exit.preheader
        li r2, 0
LBB3_2: ; no_exit
        lfd f0, 8(r3)
        lfd f1, 8(r4)
        fmul f0, f1, f0
        lfd f2, 0(r3)
        lfd f3, 0(r4)
        lfd f4, 32(r3)       ;; much nicer.
        lfd f5, 64(r3)
        lfd f6, 56(r3)
        lfd f7, 48(r3)
        lfd f8, 40(r3)
        lfd f9, 24(r3)
        lfd f10, 16(r3)
        lfd f11, 16(r4)
        fmadd f0, f3, f2, f0
        fmul f2, f1, f4
        fmadd f0, f11, f10, f0
        fmadd f2, f3, f9, f2
        fmul f1, f1, f6
        stfd f0, 0(r4)
        fmadd f0, f11, f8, f2
        fmadd f1, f3, f7, f1
        stfd f0, 8(r4)
        fmadd f0, f11, f5, f1
        addi r6, r4, 24
        stfd f0, 16(r4)
        addi r2, r2, 1
        cmpw cr0, r2, r5
        or r4, r6, r6
        bne cr0, LBB3_2 ; no_exit

This is much nicer as it reduces register pressure in the loop a lot.  On X86,
this takes the function from having 9 spilled registers to 2.  This should help
some spec programs on X86 (gzip?)

This is currently only enabled with -enable-gep-isel-opt to allow perf testing
tonight.

llvm-svn: 24606
2005-12-05 07:10:48 +00:00
Chris Lattner
07f4a0cb99 dbg.stoppoint returns a value, don't forget to init it
llvm-svn: 24583
2005-12-03 18:50:48 +00:00
Nate Begeman
31121419c8 First chunk of actually generating vector code for packed types. These
changes allow us to generate the following code:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

for this llvm:

void %foo(<4 x float>* %a) {
entry:
        %tmp1 = load <4 x float>* %a
        %tmp2 = add <4 x float> %tmp1, %tmp1
        store <4 x float> %tmp2, <4 x float>* %a
        ret void
}

llvm-svn: 24534
2005-11-30 08:22:07 +00:00
Reid Spencer
3bac59d2f0 Fix a problem with llvm-ranlib that (on some platforms) caused the archive
file to become corrupted due to interactions between mmap'd memory segments
and file descriptors closing. The problem is completely avoiding by using
a third temporary file.

Patch provided by Evan Jones

llvm-svn: 24527
2005-11-30 05:21:10 +00:00
Chris Lattner
22327b9d12 Add support for a new STRING and LOCATION node for line number support, patch
contributed by Daniel Berlin, with a few cleanups here and there by me.

llvm-svn: 24515
2005-11-29 06:21:05 +00:00
Nate Begeman
a90bb6d9b1 Check in code to scalarize arbitrarily wide packed types for some simple
vector operations (load, add, sub, mul).

This allows us to codegen:
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

on ppc as:
_foo:
        lfs f0, 12(r3)
        lfs f1, 8(r3)
        lfs f2, 4(r3)
        lfs f3, 0(r3)
        fadds f0, f0, f0
        fadds f1, f1, f1
        fadds f2, f2, f2
        fadds f3, f3, f3
        stfs f0, 12(r3)
        stfs f1, 8(r3)
        stfs f2, 4(r3)
        stfs f3, 0(r3)
        blr

llvm-svn: 24484
2005-11-22 18:16:00 +00:00
Nate Begeman
d2f6fcf327 Rather than attempting to legalize 1 x float, make sure the SD ISel never
generates it.  Make MVT::Vector expand-only, and remove the code in
Legalize that attempts to legalize it.

The plan for supporting N x Type is to continually epxand it in ExpandOp
until it gets down to 2 x Type, where it will be scalarized into a pair of
scalars.

llvm-svn: 24482
2005-11-22 01:29:36 +00:00
Chris Lattner
517942843d Unbreak codegen of bools. This should fix the llc/jit/llc-beta failures
from last night.

llvm-svn: 24427
2005-11-19 18:40:42 +00:00
Nate Begeman
7d513f65ae Teach LLVM how to scalarize packed types. Currently, this only works on
packed types with an element count of 1, although more generic support is
coming.  This allows LLVM to turn the following code:

void %foo(<1 x float> * %a) {
entry:
  %tmp1 = load <1 x float> * %a;
  %tmp2 = add <1 x float> %tmp1, %tmp1
  store <1 x float> %tmp2, <1 x float> *%a
  ret void
}

Into:

_foo:
        lfs f0, 0(r3)
        fadds f0, f0, f0
        stfs f0, 0(r3)
        blr

llvm-svn: 24416
2005-11-19 00:36:38 +00:00
Nate Begeman
78ac456d32 Split out the shift code from visitBinary.
llvm-svn: 24412
2005-11-18 07:42:56 +00:00
Chris Lattner
2095b19912 when debugging lower dbg intrinsics to calls
llvm-svn: 24377
2005-11-16 07:22:30 +00:00
Andrew Lenharth
9b036b1bdb added a chain output
llvm-svn: 24306
2005-11-11 22:48:54 +00:00
Andrew Lenharth
dca2f13e76 continued readcyclecounter support
llvm-svn: 24300
2005-11-11 16:47:30 +00:00
Chris Lattner
11d12a572e Refactor intrinsic lowering stuff out of visitCall
llvm-svn: 24261
2005-11-09 19:44:01 +00:00
Chris Lattner
306c386a79 Fix CodeGen/X86/shift-folding.ll:test3 on X86
llvm-svn: 24256
2005-11-09 16:50:40 +00:00
Chris Lattner
798441d725 Avoid creating a token factor node in trivially redundant cases. This
eliminates almost one node per block in common cases.

llvm-svn: 24254
2005-11-09 05:03:03 +00:00
Chris Lattner
948932a624 Handle GEP's a bit more intelligently. Fold constant indices early and
turn power-of-two multiplies into shifts early to improve compile time.

llvm-svn: 24253
2005-11-09 04:45:33 +00:00
Nate Begeman
aecebc076b Add the necessary support to the ISel to allow targets to codegen the new
alignment information appropriately.  Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack.  Support for
arbitrarily aligned dynamic allocas coming soon.

llvm-svn: 24224
2005-11-06 09:00:38 +00:00
Chris Lattner
d7ef6d6774 Significantly simplify this code and make it more aggressive. Instead of having
a special case hack for X86, make the hack more general: if an incoming argument
register is not used in any block other than the entry block, don't copy it to
a vreg.  This helps us compile code like this:

%struct.foo = type { int, int, [0 x ubyte] }
int %test(%struct.foo* %X) {
        %tmp1 = getelementptr %struct.foo* %X, int 0, uint 2, int 100
        %tmp = load ubyte* %tmp1                ; <ubyte> [#uses=1]
        %tmp2 = cast ubyte %tmp to int          ; <int> [#uses=1]
        ret int %tmp2
}

to:

_test:
        lbz r3, 108(r3)
        blr

instead of:

_test:
        lbz r2, 108(r3)
        or r3, r2, r2
        blr

The (dead) copy emitted to copy r3 into a vreg for extra-block uses was
increasing the live range of r3 past the load, preventing the coallescing.

This implements CodeGen/PowerPC/reg-coallesce-simple.ll

llvm-svn: 24115
2005-10-30 19:42:35 +00:00
Nate Begeman
ee581735d9 Add the ability to lower return instructions to TargetLowering. This
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).

llvm-svn: 23802
2005-10-18 23:23:37 +00:00
Chris Lattner
016497a971 Fix Generic/2005-10-18-ZeroSizeStackObject.ll by not requesting a zero
sized stack object if either the array size or the type size is zero.

llvm-svn: 23801
2005-10-18 22:14:06 +00:00
Chris Lattner
82258b6abb remove hack
llvm-svn: 23797
2005-10-18 22:11:42 +00:00
Chris Lattner
29613bce04 Enable Nate's excellent DAG combiner work by default. This allows the
removal of a bunch of ad-hoc and crufty code from SelectionDAG.cpp.

llvm-svn: 23682
2005-10-10 16:47:10 +00:00
Chris Lattner
cf12d7b556 make sure that -view-isel-dags is the input to the isel, not the input to
the second phase of dag combining

llvm-svn: 23631
2005-10-05 06:09:10 +00:00
Jeff Cohen
412582bcec Fix VC++ warnings.
llvm-svn: 23579
2005-10-01 03:57:14 +00:00
Chris Lattner
61f3785147 Add FP versions of the binary operators, keeping the int and fp worlds seperate.
Though I have done extensive testing, it is possible that this will break
things in configs I can't test.  Please let me know if this causes a problem
and I'll fix it ASAP.

llvm-svn: 23504
2005-09-28 22:28:18 +00:00
Chris Lattner
4655e9de38 If the target prefers it, use _setjmp/_longjmp should be used instead of setjmp/longjmp for llvm.setjmp/llvm.longjmp.
llvm-svn: 23481
2005-09-27 22:15:53 +00:00
Chris Lattner
49669dd169 If a function has liveins, and if the target requested that they be plopped
into particular vregs, emit copies into the entry MBB.

llvm-svn: 23331
2005-09-13 19:30:54 +00:00
Nate Begeman
143dc2039d Add an option to the DAG Combiner to enable it for beta runs, and turn on
that option for PowerPC's beta.

llvm-svn: 23253
2005-09-07 00:15:36 +00:00
Chris Lattner
365774f457 Don't create zero sized stack objects even for array allocas with a zero
number of elements.

llvm-svn: 23219
2005-09-02 18:41:28 +00:00
Chris Lattner
7d89863a77 Fix the release build, noticed by Eric van Riet Paap
llvm-svn: 23215
2005-09-02 07:09:28 +00:00
Chris Lattner
8a6c15f4f4 For values that are live across basic blocks and need promotion, use ANY_EXTEND
instead of ZERO_EXTEND to eliminate extraneous extensions.  This eliminates
dead zero extensions on formal arguments and other cases on PPC, implementing
the newly tightened up test/Regression/CodeGen/PowerPC/small-arguments.ll test.

llvm-svn: 23205
2005-09-02 00:19:37 +00:00
Chris Lattner
f2b775d686 It is NDEBUG not _NDEBUG
llvm-svn: 23186
2005-09-01 18:44:10 +00:00
Chris Lattner
e0eae3d244 Disable this code, which broke many tests last night
llvm-svn: 23114
2005-08-27 16:16:51 +00:00
Chris Lattner
e9cc12f5c4 Don't copy regs that are only used in the entry block into a vreg. This
changes the code generated for:

short %test(short %A) {
  %B = xor short %A, -32768
  ret short %B
}

to:

_test:
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 16, 31
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr

llvm-svn: 23109
2005-08-26 22:49:59 +00:00
Chris Lattner
faa96209d8 Call the InsertAtEndOfBasicBlock hook if the usesCustomDAGSchedInserter
flag is set on an instruction.

llvm-svn: 23098
2005-08-26 20:54:47 +00:00
Chris Lattner
64f7f0beac Make -view-isel-dags show the dag before instruction selecting, in case
the target isel crashes due to unimplemented features like calls :)

llvm-svn: 22997
2005-08-24 00:34:29 +00:00
Chris Lattner
d73a5042d9 Fix a problem where constant expr shifts would not have their shift amount
promoted to the right type.  This fixes: IA64/2005-08-22-LegalizerCrash.ll

llvm-svn: 22969
2005-08-22 17:28:31 +00:00
Chris Lattner
5cbeaed711 Enable critical edge splitting by default
llvm-svn: 22863
2005-08-18 17:35:14 +00:00
Chris Lattner
dbfcba7565 Add a new beta option for critical edge splitting, to avoid a problem that
Nate noticed in yacr2 (and I know occurs in other places as well).

This is still rough, as the critical edge blocks are not intelligently placed
but is added to get some idea to see if this improves performance.

llvm-svn: 22825
2005-08-17 06:37:43 +00:00
Chris Lattner
a103a2e9c6 Fix a regression on X86, where FP values can be promoted too.
llvm-svn: 22822
2005-08-17 06:06:25 +00:00
Chris Lattner
3b7e157005 Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef)
used to tack a register number onto the node.

Instead of doing this, make a new node, RegisterSDNode, which is a leaf
containing a register number.  These three operations just become normal
DAG nodes now, instead of requiring special handling.

Note that with this change, it is no longer correct to make illegal
CopyFromReg/CopyToReg nodes.  The legalizer will not touch them, and this
is bad, so don't do it. :)

llvm-svn: 22806
2005-08-16 21:55:35 +00:00
Chris Lattner
0fa4402b59 Eliminate the SetCCSDNode in favor of a CondCodeSDNode class. This pulls the
CC out of the SetCC operation, making SETCC a standard ternary operation and
CC's a standard DAG leaf.  This will make it possible for other node to use
CC's as operands in the future...

llvm-svn: 22728
2005-08-09 20:20:18 +00:00
Jeff Cohen
bd51ec7461 Eliminate all remaining tabs and trailing spaces.
llvm-svn: 22523
2005-07-27 06:12:32 +00:00