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117 Commits

Author SHA1 Message Date
Andrew Lenharth
f124519fc8 fcopysign for mixed mode 
llvm-svn: 26651
 2006-03-09 17:56:33 +00:00
Andrew Lenharth
e08d165146 alpha and llvm have different oppinions on which arg is the sign bit 
llvm-svn: 26647
 2006-03-09 17:41:50 +00:00
Andrew Lenharth
25de2846c5 Alpha Scheduling classes 
llvm-svn: 26643
 2006-03-09 17:16:45 +00:00
Andrew Lenharth
c180d749a2 fcopysign and get rid of dsnode cruft. custom PA runtimes make this better in some senses 
llvm-svn: 26641
 2006-03-09 14:58:25 +00:00
Andrew Lenharth
c879542ab0 isStoreToStackSlot 
llvm-svn: 25925
 2006-02-03 03:07:37 +00:00
Andrew Lenharth
9812806d03 Add immediate forms of cmov and remove some cruft 
llvm-svn: 25882
 2006-02-01 19:37:33 +00:00
Chris Lattner
7a06abe72b cmovle != cmovlt 
llvm-svn: 25761
 2006-01-29 03:47:30 +00:00
Chris Lattner
20d4194a0d PHI and INLINEASM are now built-in instructions provided by Target.td 
llvm-svn: 25674
 2006-01-27 01:46:15 +00:00
Andrew Lenharth
23afe2f288 minor renaming 
llvm-svn: 25640
 2006-01-26 03:24:15 +00:00
Andrew Lenharth
ad88ba7c98 allow R28 to be used for frame calculations without entirely removing it from circulation 
llvm-svn: 25639
 2006-01-26 03:22:07 +00:00
Andrew Lenharth
f7d549848c added stores to lsmark 
llvm-svn: 25552
 2006-01-23 21:51:33 +00:00
Andrew Lenharth
85b5ef30e5 fix up more lsmark stuff 
llvm-svn: 25550
 2006-01-23 21:23:26 +00:00
Andrew Lenharth
b7a4322232 yea, lowering this stuff will basically work 
llvm-svn: 25549
 2006-01-23 20:59:50 +00:00
Andrew Lenharth
96520cb68d typo 
llvm-svn: 25464
 2006-01-19 21:10:38 +00:00
Andrew Lenharth
9abecccdcb nasty nasty patterns 
llvm-svn: 25463
 2006-01-19 20:49:37 +00:00
Andrew Lenharth
b2671cf884 fix short immediate loads 
llvm-svn: 25371
 2006-01-16 21:41:39 +00:00
Andrew Lenharth
09447d44ac this pattern was bogus 
llvm-svn: 25197
 2006-01-11 03:33:06 +00:00
Andrew Lenharth
0dd7d82ec6 Int immediate loading fix 
llvm-svn: 25182
 2006-01-10 19:12:47 +00:00
Andrew Lenharth
58e26e2c4b proper branch not equal sequence 
llvm-svn: 25159
 2006-01-09 19:49:58 +00:00
Chris Lattner
0bbcba6cff unbreak the build, these are now in TargetSelectionDAG.td 
llvm-svn: 25109
 2006-01-05 04:48:15 +00:00
Andrew Lenharth
33a683c939 Move brcond over and fix some imm patterns. This may be the last change before changing the default alpha isel. 
llvm-svn: 25057
 2006-01-01 22:16:14 +00:00
Andrew Lenharth
3441657fb4 improve constant loading. Still sucks, but oh well 
llvm-svn: 25047
 2005-12-30 02:30:02 +00:00
Andrew Lenharth
13a01d794b let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean 
llvm-svn: 25040
 2005-12-29 01:06:12 +00:00
Andrew Lenharth
b87ac716bc Fix up immediate handling 
llvm-svn: 25039
 2005-12-29 00:50:08 +00:00
Andrew Lenharth
bea3ab432b Restore some happiness to the JIT 
llvm-svn: 25026
 2005-12-27 06:25:50 +00:00
Andrew Lenharth
b48bdd4aae Fix alpha regressions. 
llvm-svn: 25025
 2005-12-27 03:53:58 +00:00
Evan Cheng
231b11ba87 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
 2005-12-26 09:11:45 +00:00
Andrew Lenharth
f8a6d19367 add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG 
llvm-svn: 25011
 2005-12-25 17:36:48 +00:00
Andrew Lenharth
9e8f45d185 All that just to lower div and rem 
llvm-svn: 25008
 2005-12-25 01:34:27 +00:00
Andrew Lenharth
1e6795bc0c All addressing modes are now exposed. The only remaining relocated forms 
are for function prologue.

TODO: move external symbols over to using RelLit.
    : have a pattern that matches constpool|globaladdr
    : have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003
 2005-12-24 08:29:32 +00:00
Andrew Lenharth
588bd3f659 Unify the patterns for loads and stores. Now offset addressing should be 
supported.  This almost completes memory operations.

llvm-svn: 25002
 2005-12-24 07:34:33 +00:00
Andrew Lenharth
f4c74093bb Let's see if we can break things. 
Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.

llvm-svn: 25001
 2005-12-24 05:36:33 +00:00
Andrew Lenharth
5ce2a6c2cf move loads and stores over. Smart addr selection comming 
llvm-svn: 25000
 2005-12-24 03:41:56 +00:00
Andrew Lenharth
0a966ac994 fix FP selects 
llvm-svn: 24672
 2005-12-12 20:30:09 +00:00
Andrew Lenharth
c432a93381 FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself 
llvm-svn: 24658
 2005-12-11 03:54:31 +00:00
Andrew Lenharth
ae37aa2550 it helps if your conditionals are not reversed 
llvm-svn: 24641
 2005-12-09 00:45:42 +00:00
Andrew Lenharth
3b3088c410 fix divide and remainder 
llvm-svn: 24628
 2005-12-06 23:27:39 +00:00
Andrew Lenharth
b86d70f50a added instructions with inverted immediates 
llvm-svn: 24614
 2005-12-06 00:33:53 +00:00
Andrew Lenharth
fe52ed77e2 yea, it helps to have your path set right when testing 
llvm-svn: 24613
 2005-12-05 23:41:45 +00:00
Andrew Lenharth
0fdfe40762 These never trigger, but whatever 
llvm-svn: 24612
 2005-12-05 23:19:44 +00:00
Andrew Lenharth
0573bb5fd4 move this over to the dag 
llvm-svn: 24609
 2005-12-05 20:50:53 +00:00
Andrew Lenharth
431d24abaf Make typesafe that which isn't: FCMOVxx 
llvm-svn: 24536
 2005-11-30 17:11:20 +00:00
Andrew Lenharth
114fb4cdb1 FPSelect and more custom lowering 
llvm-svn: 24535
 2005-11-30 16:10:29 +00:00
Andrew Lenharth
dd3477b285 All sorts of stuff. 
Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy.  They should be custom lowered though.

Lots more stuff compiles now (go go single source!).  Of course, none of it
probably works, but that is what the nightly tester can find out :)

llvm-svn: 24533
 2005-11-30 07:19:56 +00:00
Andrew Lenharth
33e8022557 massive DAGISel patch. lots and lots more stuff compiles now 
llvm-svn: 24483
 2005-11-22 04:20:06 +00:00
Andrew Lenharth
dca2f13e76 continued readcyclecounter support 
llvm-svn: 24300
 2005-11-11 16:47:30 +00:00
Andrew Lenharth
1acb71df32 whatever. Intermediate patch to see what breaks. Seems ok. 
llvm-svn: 24260
 2005-11-09 19:17:08 +00:00
Andrew Lenharth
59de475c73 int comparison patterns 
llvm-svn: 24020
 2005-10-26 18:44:45 +00:00
Andrew Lenharth
de7df19b83 Simplify instinfo, set random bits on more fp insts, and fix 1 opcode 
llvm-svn: 24014
 2005-10-26 17:41:46 +00:00
Andrew Lenharth
5ad3a6c993 Add several things. 
loads
branches
setcc
working calls
Global address
External addresses

now I can manage malloc calls.

llvm-svn: 23887
 2005-10-23 03:43:48 +00:00