6 Commits

Author	SHA1	Message	Date
Eli Friedman	0ea2c325a9	Default 64-bit target features and SSE2 on when a triple specifies x86-64. Clean up all the other hacks which are now unnecessary. ... llvm-svn: 134753	2011-07-08 22:16:47 +00:00
Chris Lattner	c3b630d64b	fix the BuildVector -> unpcklps logic to not do pointless shuffles ... when the top elements of a vector are undefined. This happens all the time for X86-64 ABI stuff because only the low 2 elements of a 4 element vector are defined. For example, on: _Complex float f32(_Complex float A, _Complex float B) { return A+B; } We used to produce (with SSE2, SSE4.1+ uses insertps): _f32: ## @f32 movdqa %xmm0, %xmm2 addss %xmm1, %xmm2 pshufd $16, %xmm2, %xmm2 pshufd $1, %xmm1, %xmm1 pshufd $1, %xmm0, %xmm0 addss %xmm1, %xmm0 pshufd $16, %xmm0, %xmm1 movdqa %xmm2, %xmm0 unpcklps %xmm1, %xmm0 ret We now produce: _f32: ## @f32 movdqa %xmm0, %xmm2 addss %xmm1, %xmm2 pshufd $1, %xmm1, %xmm1 pshufd $1, %xmm0, %xmm3 addss %xmm1, %xmm3 movaps %xmm2, %xmm0 unpcklps %xmm3, %xmm0 ret This implements rdar://8368414 llvm-svn: 112378	2010-08-28 17:28:30 +00:00
Chris Lattner	bc2f7bb5f3	Add a hackaround for PR7993 which is causing failures on x86 builders that lack sse2. ... llvm-svn: 112175	2010-08-26 06:57:07 +00:00
Chris Lattner	148485f707	implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1. ... llvm-svn: 112171	2010-08-26 05:51:22 +00:00
Chris Lattner	3bec87fb38	Make sure this forces the x86 targets ... llvm-svn: 112169	2010-08-26 05:25:05 +00:00
Chris Lattner	5256226fc8	fix sse1 only codegen in x86-64 mode, which is something we ... apparently try to support. llvm-svn: 112168	2010-08-26 05:24:29 +00:00