8 Commits

Author	SHA1	Message	Date
Andrew Trick	d09b64fc25	Instruction scheduling itinerary for Intel Atom. ... Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT. Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches. Adds a test to verify that the scheduler is working. Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP. Patch by Preston Gurd! llvm-svn: 149558	2012-02-01 23:20:51 +00:00
Pete Cooper	cca60da8cd	Changed test to check for correct load size instead of shift as the shift might change if optimised ... llvm-svn: 143116	2011-10-27 18:15:58 +00:00
Nadav Rotem	8ed6f090ef	Enable element promotion type legalization by deafault. ... Changed tests which assumed that vectors are legalized by widening them. llvm-svn: 142152	2011-10-16 20:31:33 +00:00
Chris Lattner	ad85635a93	now that generic vector types aren't selected onto MMX registers, these ... tests don't need -disable-mmx. llvm-svn: 122188	2010-12-19 20:12:58 +00:00
Dan Gohman	6a48222bd8	Change TargetData's algorithm for computing defualt vector type ... alignment to match what's used in clang and GCC for __alignof, rather than trying to guess what Legalize is going to be doing. llvm-svn: 102206	2010-04-23 19:41:15 +00:00
Jakob Stoklund Olesen	a027a6d4f2	Enable -sse-domain-fix by default. Now with tests! ... llvm-svn: 99954	2010-03-30 22:47:00 +00:00
Mon P Wang	005a544af8	Fixed a widening bug where we were not using the correct size for the load ... llvm-svn: 98920	2010-03-19 01:19:52 +00:00
Mon P Wang	871ea08e40	Improved widening loads by adding support for wider loads if ... the alignment allows. Fixed a bug where we didn't use a vector load/store for PR5626. llvm-svn: 94338	2010-01-24 00:05:03 +00:00