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Commit Graph

19 Commits

Author SHA1 Message Date
Evan Cheng
157d40fba1 Hide the call to InitMCInstrInfo into tblgen generated ctor.
llvm-svn: 134244
2011-07-01 17:57:27 +00:00
Anton Korobeynikov
c87f68e32e Move callee-saved regs spills / reloads to TFI
llvm-svn: 120228
2010-11-27 23:05:03 +00:00
Jakob Stoklund Olesen
44949b2e1b Remove the isMoveInstr() hook.
llvm-svn: 108567
2010-07-16 22:35:46 +00:00
Jakob Stoklund Olesen
fb3525531b Replace copyRegToReg with copyPhysReg for MSP430.
llvm-svn: 108080
2010-07-11 06:53:30 +00:00
Stuart Hastings
bd7194d21c Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.

This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.

llvm-svn: 106243
2010-06-17 22:43:56 +00:00
Evan Cheng
241d2c434e Implement @llvm.returnaddress. rdar://8015977.
llvm-svn: 104421
2010-05-22 01:47:14 +00:00
Dan Gohman
497e752655 Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.

llvm-svn: 103194
2010-05-06 20:33:48 +00:00
Evan Cheng
80f3051bb7 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
llvm-svn: 103193
2010-05-06 19:06:44 +00:00
Anton Korobeynikov
f1080f2bbe Add branch relaxation pass (shamelessly stolen from PPC).
llvm-svn: 93554
2010-01-15 21:19:05 +00:00
Dan Gohman
f9654e9258 Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.

llvm-svn: 90634
2009-12-05 00:44:40 +00:00
Anton Korobeynikov
6329ddd231 Implement branch folding
llvm-svn: 84774
2009-10-21 19:17:18 +00:00
Anton Korobeynikov
c9ed87ea9a Cosmetic changes, no functionality changes
llvm-svn: 84773
2009-10-21 19:16:49 +00:00
Anton Korobeynikov
806b8efb5e Add InsertBranch() hook for tail mergeing
llvm-svn: 70754
2009-05-03 13:15:22 +00:00
Anton Korobeynikov
f7943f8df6 Lower select with custom inserted and make condjumps generic
llvm-svn: 70744
2009-05-03 13:12:23 +00:00
Anton Korobeynikov
d55d6586ae Add first draft for conditions, conditional branches, etc
llvm-svn: 70743
2009-05-03 13:12:06 +00:00
Anton Korobeynikov
10d199fa80 Add code for save/restore of callee-saved registers
llvm-svn: 70739
2009-05-03 13:11:04 +00:00
Anton Korobeynikov
e7639579a3 First draft of stack slot loads / stores lowering
llvm-svn: 70735
2009-05-03 13:09:57 +00:00
Anton Korobeynikov
e9e0353b21 Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly!
llvm-svn: 70710
2009-05-03 13:02:04 +00:00
Anton Korobeynikov
d49e584da5 Dummy MSP430 backend
llvm-svn: 70694
2009-05-03 12:57:15 +00:00