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Commit Graph

105158 Commits

Author SHA1 Message Date
Chandler Carruth
c99cbd9cc7 [x86] Fix another bug hit when bootstrapping with the new shuffle
lowering.

For maximum irony, I had already discovered this bug, diagnosed it, and
left FIXMEs about it in the test cases. =[ I just failed to go back over
those until after i had reduced a bootstrap miscompile down to a single
TU, stared at the assembly for an hour, and figured out the bug. Again.

Oh well.

llvm-svn: 211955
2014-06-27 20:07:40 +00:00
Aaron Ballman
83c84b0d61 Reverting r211950 -- it did not help resolve the -Wcomment warnings triggered in GCC.
llvm-svn: 211953
2014-06-27 19:52:34 +00:00
Justin Holewinski
42c18ad508 [NVPTX] Use GreatestCommonDivisor64 from MathExtras instead of using our own. Thanks Hal!
llvm-svn: 211952
2014-06-27 19:36:25 +00:00
Aaron Ballman
06dd820d68 Adding some trailing whitespace after a comment previously ending with \ to ensure that it isn't lexed as a multiline comment. This silences some -Wcomment warnings.
llvm-svn: 211950
2014-06-27 19:05:17 +00:00
David Majnemer
cd75aeba23 Include <tuple> to make buildbots happy
llvm-svn: 211949
2014-06-27 18:38:12 +00:00
Justin Holewinski
2a38f449ff [NVPTX] Add reflect intrinsic (better than matching by function name)
Also clean up some of the logic in NVVMReflect.cpp while we're messing around in there.

llvm-svn: 211948
2014-06-27 18:36:11 +00:00
Justin Holewinski
4dfd654c73 [NVPTX] Handle all possible vector types in getSetCCResultType, not just the ones representable as MVTs
llvm-svn: 211947
2014-06-27 18:36:08 +00:00
Justin Holewinski
3774707bba [NVPTX] Add 'b' asm constraint
llvm-svn: 211946
2014-06-27 18:36:06 +00:00
Justin Holewinski
b2ff2161f2 [NVPTX] Simplify some argument lowering logic
llvm-svn: 211945
2014-06-27 18:36:04 +00:00
Justin Holewinski
d4b13b9bc6 [NVPTX] Do not process samplers in GenericToNVVM
llvm-svn: 211944
2014-06-27 18:36:02 +00:00
Justin Holewinski
caff2b4efe [NVPTX] Error out if initializer is given for variable in an address space that does not support initialization
llvm-svn: 211943
2014-06-27 18:36:01 +00:00
Justin Holewinski
004cf81d64 [NVPTX] Add support for .managed variables for UVM
llvm-svn: 211942
2014-06-27 18:35:58 +00:00
Justin Holewinski
6888ca5201 [NVPTX] Emit .weak linkage for link_once, weak, available_externally, and common linkage
llvm-svn: 211941
2014-06-27 18:35:56 +00:00
Justin Holewinski
20bb9827a8 [NVPTX] Variables that start with llvm. or nvvm. are reserved and should not be emitted
llvm-svn: 211940
2014-06-27 18:35:53 +00:00
Justin Holewinski
0ed0e4b150 [NVPTX] Fix handling of ldg/ldu intrinsics.
The address space of the pointer must be global (1) for these intrinsics.  There must also be alignment metadata attached to the intrinsic calls, e.g.

%val = tail call i32 @llvm.nvvm.ldu.i.global.i32.p1i32(i32 addrspace(1)* %ptr), !align !0

!0 = metadata !{i32 4}

llvm-svn: 211939
2014-06-27 18:35:51 +00:00
Justin Holewinski
6fc5dab1cf [NVPTX] Clean up argument lowering code and properly handle alignment for structs and vectors
llvm-svn: 211938
2014-06-27 18:35:44 +00:00
Justin Holewinski
92e1b59c28 [NVPTX] Add missing boolean vector contents flag
llvm-svn: 211937
2014-06-27 18:35:42 +00:00
Justin Holewinski
97b1e28f31 [NVPTX] Add support for [SHL,SRA,SRL]_PARTS
llvm-svn: 211936
2014-06-27 18:35:40 +00:00
Justin Holewinski
7663d1fd5a [NVPTX] Implement fma and imad contraction as target DAGCombiner patterns
This also introduces DAGCombiner patterns for mul.wide to multiply two smaller integers and produce a larger integer

llvm-svn: 211935
2014-06-27 18:35:37 +00:00
Justin Holewinski
1c8d752df2 [NVPTX] Add support for efficient rotate instructions on SM 3.2+
llvm-svn: 211934
2014-06-27 18:35:33 +00:00
Justin Holewinski
b7ecf6b4d6 [NVPTX] Add missing isel patterns for 64-bit atomics
llvm-svn: 211933
2014-06-27 18:35:30 +00:00
Justin Holewinski
2ffa2d24b0 [NVPTX] Add isel patterns for bit-field extract (bfe)
llvm-svn: 211932
2014-06-27 18:35:27 +00:00
Justin Holewinski
7c9cd5f566 [NVPTX] Add support for isspacep instruction
llvm-svn: 211931
2014-06-27 18:35:24 +00:00
Justin Holewinski
ab34c507cf [NVPTX] Add support for envreg reads
llvm-svn: 211930
2014-06-27 18:35:21 +00:00
Justin Holewinski
6eaef88634 [NVPTX] Add target options for PTX 3.2/4.0 and SM 5.0 (Maxwell)
Default PTX version is set to PTX 3.2

llvm-svn: 211929
2014-06-27 18:35:18 +00:00
Justin Holewinski
1c2cdcb292 [NVPTX] Update sub-target feature detection
llvm-svn: 211928
2014-06-27 18:35:16 +00:00
Justin Holewinski
7d536fecc0 [NVPTX] Directly control the Machine SSA passes that are invoked for NVPTX.
NVPTX is a bit special in the optimizations it requires, so this gives
us better control over the backend optimization pipeline.

llvm-svn: 211927
2014-06-27 18:35:14 +00:00
Justin Holewinski
a3b8653f47 [NVPTX] Emit .weak when linkage is not external, internal, or private
llvm-svn: 211926
2014-06-27 18:35:10 +00:00
Justin Holewinski
b137c23ee9 [NVPTX] Just use getTypeAllocSize() when computing return value size for structures and vectors
llvm-svn: 211925
2014-06-27 18:35:08 +00:00
Tyler Nowicki
8327f835c8 Vectorization documentation for loop hint pragmas and Rpass diagnostics.
llvm-svn: 211924
2014-06-27 18:30:08 +00:00
Aaron Ballman
172ae5e180 Silencing some -Wcast-qual warnings. No functional changes intended.
llvm-svn: 211923
2014-06-27 18:25:49 +00:00
Chandler Carruth
ec4fb8a59b [x86] Fix a miscompile in the new shuffle lowering uncovered by
a bootstrap.

I managed to mis-remember how PACKUS worked on x86, and was using undef
for the high bytes instead of zero. The fix is fairly obvious.

llvm-svn: 211922
2014-06-27 18:25:23 +00:00
David Majnemer
abf7854d05 IR: Add COMDATs to the IR
This new IR facility allows us to represent the object-file semantic of
a COMDAT group.

COMDATs allow us to tie together sections and make the inclusion of one
dependent on another. This is required to implement features like MS
ABI VFTables and optimizing away certain kinds of initialization in C++.

This functionality is only representable in COFF and ELF, Mach-O has no
similar mechanism.

Differential Revision: http://reviews.llvm.org/D4178

llvm-svn: 211920
2014-06-27 18:19:56 +00:00
Reid Kleckner
e91e249372 cmake: Don't do anything for LLVM_ENABLE_ASSERTIONS=OFF
By default, CMake will set NDEBUG in Rel* builds and leave it off in
debug builds, so we shouldn't need to do anything ourselves.

Before this change, it was possible to a Debug build without assertions
(aka Debug-Asserts in the autoconf system) by configuring with
-DLLVM_ENABLE_ASSERTIONS=OFF, but this configuration isn't very useful.
You can still get the same effect by explicitly adding -DNDEBUG to
CFLAGS.

Differential Revision: http://reviews.llvm.org/D4257

Patch by Janusz Sobczak!

llvm-svn: 211919
2014-06-27 18:17:30 +00:00
Julien Lerouge
5dbf44035a lldb can interrupt waitpid, so EINTR shouldn't be an error. This fixes the case
where there is no timeout. In the case where there is a timeout though, the
code is still wrong since it doesn't check that the alarm really went off.

Without this patch, I cannot debug a program that forks itself using
sys::ExecuteAndWait with lldb.

llvm-svn: 211918
2014-06-27 18:02:54 +00:00
Matt Arsenault
5e70db4151 R600: Move trivial getters into header, use initializer list
llvm-svn: 211917
2014-06-27 17:57:00 +00:00
David Blaikie
06bae5c2fe Fix test so it doesn't try to write out temporary files into the test tree.
llvm-svn: 211916
2014-06-27 17:45:43 +00:00
Logan Chien
f308787727 Avoid non-ascii character in the source code.
llvm-svn: 211914
2014-06-27 17:25:54 +00:00
David Majnemer
c2cdc28730 MC: Fix associative sections on COFF
COFF sections in MC were represented by a tuple of section-name and
COMDAT-name.  This is not sufficient to represent a .text section
associated with another .text section; we need a way to distinguish
between the key section and the one marked associative.

llvm-svn: 211913
2014-06-27 17:19:44 +00:00
Juergen Ributzka
f7b405f472 [FastISel][X86] Fix typos.
llvm-svn: 211911
2014-06-27 17:16:34 +00:00
Matt Arsenault
128df7aaf1 R600: Don't crash on unhandled instruction in promote alloca
llvm-svn: 211906
2014-06-27 16:52:49 +00:00
Ed Maste
2e5df25fce llvm-objdump: don't assert if ELF file has no sections
FreeBSD core files, for example, have no sections (only program headers).

llvm.org/pr20139
Differential Revision: http://reviews.llvm.org/D4323

llvm-svn: 211904
2014-06-27 16:37:20 +00:00
Alexander Kornienko
3be4bd19cf Clean up unused variable warning in release build.
llvm-svn: 211902
2014-06-27 15:30:55 +00:00
Chandler Carruth
35b7259047 Re-apply r211287: Remove support for LLVM runtime multi-threading.
I'll fix the problems in libclang and other projects in ways that don't
require <mutex> until we sort out the cygwin situation.

llvm-svn: 211900
2014-06-27 15:13:01 +00:00
Ulrich Weigand
85c764c15a [PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndex
I've run into a bug where current LLVM at -O0 (with fast-isel)
generated invalid code like:

        ld 0, 20936(1)                  # 8-byte Folded Reload
        stw 12, 10348(0)
        stw 12, 10344(0)

The underlying vreg had been introduced as base register by the
Local Stack Slot Allocation pass.  That register was constrained
to G8RC by PPCRegisterInfo::materializeFrameBaseRegister to match
the ADDI instruction used to set it, but it was *not* constrained
to G8RC_NOX0 to fit the *use* of the register in an address.

That should have happened in PPCRegisterInfo::resolveFrameIndex.
This patch adds an appropriate constrainRegClass call.

Reviewed by Hal Finkel.

llvm-svn: 211897
2014-06-27 13:04:12 +00:00
Chandler Carruth
608f397a25 [x86] Clean up some unused variables, especially in release builds.
llvm-svn: 211894
2014-06-27 12:04:18 +00:00
Chandler Carruth
e7aaf337d0 [x86] Teach the target combine step to aggressively fold pshufd insturcions.
Summary:
This allows it to fold pshufd instructions across intervening
half-shuffles and other noise. This pattern actually shows up in the
generic lowering tests, but I've also added direct tests using
intrinsics to make sure that the specific desired functionality is
working even if the lowering stuff changes in the future.

Differential Revision: http://reviews.llvm.org/D4292

llvm-svn: 211892
2014-06-27 11:40:13 +00:00
Simon Atanasyan
fb5fe85156 [ELF][Mips] Fix recognition of MIPS 64-bit arch in the ELFObjectFile:getArch() method.
llvm-svn: 211891
2014-06-27 11:36:45 +00:00
Chandler Carruth
127f1b532c [x86] Teach the target-specific combining how to aggressively fold
half-shuffles, even looking through intervening instructions in a chain.

Summary:
This doesn't happen to show up with any test cases I've found for the current
shuffle lowering, but previous attempts would benefit from this and it seems
generally useful. I've tested it directly using intrinsics, which also shows
that it will work with hand vectorized code as well.

Note that even though pshufd isn't directly used in these tests, it gets
exercised because we combine some of the half shuffles into a pshufd
first, and then merge them.

Differential Revision: http://reviews.llvm.org/D4291

llvm-svn: 211890
2014-06-27 11:34:40 +00:00
Chandler Carruth
c62b16ce89 [x86] Teach the X86 backend to DAG-combine SSE2 shuffles that are
trivially redundant.

This fixes several cases in the new vector shuffle lowering algorithm
which would generate redundant shuffle instructions for the sake of
simplicity.

I'm also deleting a testcase which was somewhat ridiculous. It was
checking for a bug in 2007 about incorrectly transforming shuffles by
looking for the string "-86" in the output of a pretty substantial
function. This test case doesn't seem to have any value at this point.

Differential Revision: http://reviews.llvm.org/D4240

llvm-svn: 211889
2014-06-27 11:27:52 +00:00