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9 Commits

Author SHA1 Message Date
Jim Grosbach
13a45d88e5 ARM two-operand forms for vhadd and vhsub instructions. 
rdar://11252521

llvm-svn: 154875
 2012-04-16 23:00:25 +00:00
Jim Grosbach
d961988871 ARM two-operand aliases for VRHADD instructions. 
rdar://11252521

llvm-svn: 154832
 2012-04-16 17:14:11 +00:00
Jim Grosbach
33a32d0d92 Tidy up. Testcase formatting. 
llvm-svn: 154831
 2012-04-16 17:14:07 +00:00
Jim Grosbach
a33af36947 ARM VQADD implied destination operand form aliases. 
llvm-svn: 146179
 2011-12-08 20:49:43 +00:00
Jim Grosbach
da0a3e310a ARM two-operand aliases for VADDW instructions. 
llvm-svn: 146093
 2011-12-07 23:01:10 +00:00
Jim Grosbach
ecf9c2bb21 ARM two-operand aliases for VADD instructions. 
llvm-svn: 146091
 2011-12-07 22:52:54 +00:00
Owen Anderson
09920faec7 Use ARM-style comment syntax. 
llvm-svn: 117941
 2010-11-01 18:33:37 +00:00
Jim Grosbach
76910aa62f Mark ARM subtarget features that are available for the assembler. 
llvm-svn: 117929
 2010-11-01 16:59:54 +00:00
Owen Anderson
9930e7bcb6 Convert this test to a .s file, so that it's not sensitive to codegen changes. 
llvm-svn: 117633
 2010-10-29 01:01:56 +00:00