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f658191412
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2744 Commits

Author SHA1 Message Date
Evan Cheng
f658191412 ADC and SBB uses EFLAGS. 
llvm-svn: 42640
 2007-10-05 17:59:57 +00:00
Dan Gohman
821635b63f Change a few more spaces to tabs in assembly output. 
llvm-svn: 42638
 2007-10-05 15:58:41 +00:00
Dan Gohman
950f96e456 Change a space to a tab in the assembly output of a .globl directive 
for consistency.

llvm-svn: 42637
 2007-10-05 15:54:58 +00:00
Evan Cheng
4e46ad06fe Testing convertToThreeeAddress as X86 llcbeta. 
llvm-svn: 42630
 2007-10-05 08:04:01 +00:00
Evan Cheng
6e5205d379 Added storeRegToAddr, loadRegFromAddr, and unfoldMemoryOperand's. 
llvm-svn: 42624
 2007-10-05 01:34:55 +00:00
Evan Cheng
32766d3518 Not needed any more. 
llvm-svn: 42623
 2007-10-05 01:34:14 +00:00
Chris Lattner
4224151a44 add a note. 
llvm-svn: 42607
 2007-10-04 15:47:27 +00:00
Dan Gohman
30ba45b569 Use empty() member functions when that's what's being tested for instead 
of comparing begin() and end().

llvm-svn: 42585
 2007-10-03 19:26:29 +00:00
Chris Lattner
a31fa80185 add a note 
llvm-svn: 42579
 2007-10-03 17:10:03 +00:00
Chris Lattner
dfcb750656 Bill's example is still not enough to repro this, but it has other issues that 
seem significant as well.

llvm-svn: 42564
 2007-10-03 03:40:24 +00:00
Bill Wendling
c5fbf331ff Another micro-opt. 
llvm-svn: 42554
 2007-10-02 21:49:31 +00:00
Bill Wendling
c4a53b617f Another missed optimization with LICM. 
llvm-svn: 42552
 2007-10-02 21:43:06 +00:00
Bill Wendling
36f033e53e Small label changes. 
llvm-svn: 42549
 2007-10-02 21:02:53 +00:00
Bill Wendling
a7d5c36215 Now with source code. 
llvm-svn: 42548
 2007-10-02 21:01:16 +00:00
Bill Wendling
0159f0c5ba Now with LL code! 
llvm-svn: 42547
 2007-10-02 20:54:32 +00:00
Bill Wendling
48c27bf598 Another missed optimization. 
llvm-svn: 42546
 2007-10-02 20:42:59 +00:00
Bill Wendling
5e50716a6b Micro-optimization -- missed LICM opportunity. 
llvm-svn: 42542
 2007-10-02 19:55:05 +00:00
Evan Cheng
3537dbbd1e Refactor code to add load / store folded instructions -> register only 
instructions reverse map.

llvm-svn: 42509
 2007-10-01 23:44:33 +00:00
Evan Cheng
c863779cd4 Typo. X86comi doesn't read / write chain's. 
llvm-svn: 42492
 2007-10-01 18:12:48 +00:00
Gordon Henriksen
9b5a117d01 AsmPrinters overriding getAnalysisUsage should call super. 
And not super's super, either.

llvm-svn: 42482
 2007-09-30 13:39:29 +00:00
Evan Cheng
f3c130a8b6 Enabling new condition code modeling scheme. 
llvm-svn: 42459
 2007-09-29 00:00:36 +00:00
Rafael Espindola
01b306e575 Refactor the memcpy lowering for the x86 target. 
The only generated code difference is that now we call memcpy when
the size of the array is unknown. This matches GCC behavior and is
better since the run time value can be arbitrarily large.

llvm-svn: 42433
 2007-09-28 12:53:01 +00:00
Evan Cheng
c2acb6f2e5 Stop inventing new words. :-) 
llvm-svn: 42429
 2007-09-28 01:35:02 +00:00
Evan Cheng
d3ff9d3ff7 Pessimisively assume ADJCALLSTACKDOWN / ADJCALLSTACKUP (which becomes sub / add) clobbers EFLAGS. 
llvm-svn: 42426
 2007-09-28 01:19:48 +00:00
Dan Gohman
50747737a5 TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets 
other than PPC64. Instead of fixing it, just remove it and fix all the
places that use it to use TargetData::getPointerSize() instead, as there
aren't very many. Most of the references were in DwarfWriter.cpp.

llvm-svn: 42419
 2007-09-27 23:12:31 +00:00
Evan Cheng
d8ab90ae1f Use GR64 in 64-bit mode. 
llvm-svn: 42417
 2007-09-27 21:50:05 +00:00
Evan Cheng
826f0f94df Doh. Calls clobber EFLAGS. 
llvm-svn: 42413
 2007-09-27 19:01:55 +00:00
Evan Cheng
0f9e307353 - Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes where reg to reg copies are not possible, this returns another register class which registers in the specified register class can be copied to (and copy back from). 
- X86 copyRegToReg() now supports copying between EFLAGS and GR32 / GR64 registers.

llvm-svn: 42372
 2007-09-26 21:31:07 +00:00
Evan Cheng
66eeb8440c Some assemblers do not recognize aliases pushfd, pushfq, popfd, and popfq. Just emit them as pushf and popf. 
llvm-svn: 42371
 2007-09-26 21:28:00 +00:00
Dale Johannesen
69595b587f Enable codegen for long double abs, sin, cos 
llvm-svn: 42368
 2007-09-26 21:10:55 +00:00
Evan Cheng
37ee6eba29 Typos: POPQ -> POPFQ, POPD -> POPFD. 
llvm-svn: 42348
 2007-09-26 06:38:29 +00:00
Chris Lattner
86e73ac224 move PR1160 here. 
llvm-svn: 42347
 2007-09-26 06:29:31 +00:00
Evan Cheng
5f9e291240 Allow copyRegToReg to emit cross register classes copies. 
Tested with "make check"!

llvm-svn: 42346
 2007-09-26 06:25:56 +00:00
Chris Lattner
2efd3899f2 move PR1264 here. 
llvm-svn: 42345
 2007-09-26 06:15:48 +00:00
Evan Cheng
5cb9dbaaa1 Add pushf{d|q}, popf{d|q} to push and pop EFLAGS register. 
llvm-svn: 42335
 2007-09-26 01:29:06 +00:00
Evan Cheng
38c7d5082a translateX86CC updates the last two operands. 
llvm-svn: 42333
 2007-09-26 00:45:55 +00:00
Anton Korobeynikov
8cd666b659 Correctly restore stack pointer after realignment in main() on Cygwin/Mingw32 
llvm-svn: 42332
 2007-09-26 00:13:34 +00:00
Evan Cheng
24c5a1a484 Missing load / store folding entries. 
llvm-svn: 42323
 2007-09-25 22:10:43 +00:00
Anton Korobeynikov
ca03aec919 Partly revert invalid r41774 
llvm-svn: 42322
 2007-09-25 21:52:30 +00:00
Dan Gohman
99e8e1ff08 More explicit keywords. 
llvm-svn: 42316
 2007-09-25 20:27:06 +00:00
Dan Gohman
a01dd49472 Fix a typo in a comment. 
llvm-svn: 42313
 2007-09-25 19:37:26 +00:00
Evan Cheng
a58633d67b New style x87 cmp instructions. 
llvm-svn: 42312
 2007-09-25 19:08:02 +00:00
Dan Gohman
1bb346f9f1 When both x/y and x%y are needed (x and y both scalar integer), compute 
both results with a single div or idiv instruction. This uses new X86ISD
nodes for DIV and IDIV which are introduced during the legalize phase
so that the SelectionDAG's CSE can automatically eliminate redundant
computations.

llvm-svn: 42308
 2007-09-25 18:23:27 +00:00
Dan Gohman
8385890394 Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and 
the check to see if the assembler supports .loc from X86TargetLowering
into the superclass TargetLowering.

llvm-svn: 42297
 2007-09-25 15:10:49 +00:00
Evan Cheng
36b3babfde Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after 
all the kinks are worked out.

llvm-svn: 42285
 2007-09-25 01:57:46 +00:00
Dale Johannesen
5ea6a9bc3a When mixing SSE and x87 codegen, it's possible to 
have situations where an SSE instruction turns into
multiple blocks, with the live range of an x87
register crossing them.  To do this correctly make
sure we examine all blocks when inserting
FP_REG_KILL.  PR 1697.  (This was exposed by my
fix for PR 1681, but the same thing could happen
mixing x87 long double with SSE.)

llvm-svn: 42281
 2007-09-24 22:52:39 +00:00
Dan Gohman
96d5f979bc Add support on x86 for having Legalize lower ISD::LOCATION to ISD::DEBUG_LOC 
instead of ISD::LABEL with a manual .debug_line entry when the assembler
supports .file and .loc directives.

llvm-svn: 42278
 2007-09-24 21:54:14 +00:00
Dan Gohman
a264777dc1 Fix the syntax for the .loc directive in preparation for using it. 
llvm-svn: 42268
 2007-09-24 19:25:06 +00:00
Dan Gohman
32b1df2aa3 The code that used the StartLabelId label was removed, so remove the 
code that creates the label too.

llvm-svn: 42265
 2007-09-24 16:44:26 +00:00
Chris Lattner
594d3aa066 claim that "st" is from the 80-bit register file. This causes x87-using inline 
asm to die with:

ScheduleDAG.cpp:269: failed assertion `false && "Couldn't find the register class"'

instead of:
failed assertion `RegMap->getRegClass(VReg) == RC && "Register class of operand and regclass of use don't agree!"'

yay.

llvm-svn: 42259
 2007-09-24 05:27:37 +00:00