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Author SHA1 Message Date
Tom Stellard
5da7926d0a R600/SI: Fixing handling of condition codes 
We were ignoring the ordered/onordered bits and also the signed/unsigned
bits of condition codes when lowering the DAG to MachineInstrs.

NOTE: This is a candidate for the 3.4 branch.
llvm-svn: 195514
 2013-11-22 23:07:58 +00:00