RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 12:02:58 +02:00
Code Issues Projects Releases Wiki Activity
91,034 Commits 4 Branches 5 Tags 704 MiB
f96cc4976d
Commit Graph

8 Commits

Author SHA1 Message Date
Evan Cheng
f87900c4b1 Add x86 isel lowering logic to form bit test with inverted condition. e.g. 
x ^ -1.

Patch by David Majnemer.
rdar://12755626

llvm-svn: 169339
 2012-12-05 00:10:38 +00:00
Dan Gohman
df2896d609 Eliminate more uses of llvm-as and llvm-dis. 
llvm-svn: 81290
 2009-09-08 23:54:48 +00:00
Dan Gohman
7b176db971 Add explicit -march=x86 to these tests so that they don't 
default to -march=x86-64 on 64-bit hosts.

llvm-svn: 63579
 2009-02-03 00:20:22 +00:00
Dan Gohman
9d120d6d8f Make x86's BT instruction matching more thorough, and add some 
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.

llvm-svn: 63266
 2009-01-29 01:59:02 +00:00
Dan Gohman
8c835f6285 Disable the register+memory forms of the bt instructions for now. Thanks 
to Eli for pointing out that these forms don't ignore the high bits of
their index operands, and as such are not immediately suitable for use
by isel.

llvm-svn: 62194
 2009-01-13 23:23:30 +00:00
Evan Cheng
c52f942d67 Do not isel load folding bt instructions for pentium m, core, core2, and AMD processors. These are significantly slower than a load followed by a bt of a register. 
llvm-svn: 61557
 2009-01-02 05:35:45 +00:00
Chris Lattner
cd245cc5c3 add PR # 
llvm-svn: 61427
 2008-12-25 05:40:38 +00:00
Chris Lattner
fde038935b Add a simple pattern for matching 'bt'. 
llvm-svn: 61426
 2008-12-25 05:34:37 +00:00