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Commit Graph

201641 Commits

Author SHA1 Message Date
Chuanqi Xu
dc97d0ff53 [Coroutines] Use to collect lifetime marker of in CoroFrame Differential Revision: https://reviews.llvm.org/D85279 2020-08-06 14:21:55 +08:00
Craig Topper
b9b5a7ec13 [X86] Remove incomplete custom handling of i128 sdivrem/udivrem on Windows.
We need to have special handling of i128 div/rem on Windows due
to a weird calling convention needed for the libcall. There was
also some code that made it look like we do the same for sdivrem/udiv,
but the code didn't account for multiple return values of those
functions so couldn't possibly work. I think this code never
triggers because we don't have libcall names defined for those
functions by default so DAGCombine never creates DIVREM nodes.
2020-08-05 23:01:07 -07:00
Douglas Yung
23b9768503 Fix typo in test. Thanks to Andrew Ng for spotting this! 2020-08-05 22:56:15 -07:00
Lang Hames
94684e8bbe [JITLink][MachO][AArch64] More PAGEOFF12 relocation fixes.
Correctly sign extend the addend, and fix implicit shift operand decoding
(it incorrectly returned 0 for some cases), and check that the initial
encoded immediate is 0.
2020-08-05 21:09:45 -07:00
Matt Arsenault
5d9720d33a AMDGPU: Remove ATOMIC_PK_FADD
The f32 and v2f16 cases should be handled the same way.
2020-08-05 22:00:52 -04:00
Arthur Eubanks
30eacbff3b [NewPM][opt] Add more codegen passes
Reduces number of failures by 92.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D85381
2020-08-05 18:59:52 -07:00
Ruiling Song
de9c413633 [AMDGPU] add buffer_atomic_swap for float
The functionality is used when calling imageAtomicExhange() on float
type imageBuffer in Graphics shaders.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D85187
2020-08-06 09:45:48 +08:00
Juneyoung Lee
1112f9ad6f [JumpThreading] Allow duplicating a basic block into preds when its branch condition is freeze(phi)
This is the last JumpThreading patch for getting the performance numbers shown at
https://reviews.llvm.org/D84940#2184653 .

This patch makes ProcessBlock call ProcessBranchOnPHI when the branch condition
is freeze(phi) as well (originally it calls the function when the condition is
phi only).

Since what ProcessBranchOnPHI does is to duplicate the basic block into
predecessors if profitable, it is still valid when the condition is freeze(phi)
too.

```
    p = phi [a, pred1] [b, pred2]
    p.fr = freeze p
    br p.fr, ...
=>
  pred1:
    p.fr = freeze a
    br p.fr, ...
  pred2:
    p.fr2 = freeze b
    br p.fr2, ...
```

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D85029
2020-08-06 09:51:17 +09:00
Juneyoung Lee
d2cb125458 [JumpThreading] Add a test that duplicates insts of a basic block with cond br to preds; NFC 2020-08-06 09:19:23 +09:00
Alina Sbirlea
d22d8b1c0c [MSSA] Update test with more detailed and resilient checks. [NFC] 2020-08-05 16:46:44 -07:00
LLVM GN Syncbot
0325b9905f [gn build] Port 820e8d8656e 2020-08-05 23:35:59 +00:00
Petr Hosek
70737c97db [CMake] Simplify CMake handling for zlib
Rather than handling zlib handling manually, use find_package from CMake
to find zlib properly. Use this to normalize the LLVM_ENABLE_ZLIB,
HAVE_ZLIB, HAVE_ZLIB_H. Furthermore, require zlib if LLVM_ENABLE_ZLIB is
set to YES, which requires the distributor to explicitly select whether
zlib is enabled or not. This simplifies the CMake handling and usage in
the rest of the tooling.

This is a reland of abb0075 with all followup changes and fixes that
should address issues that were reported in PR44780.

Differential Revision: https://reviews.llvm.org/D79219
2020-08-05 16:07:11 -07:00
Craig Topper
7af487b243 [X86] Rename mod128.ll to divmod128.ll and add test cases for sdiv/udiv/urem.
This improves code coverage on the switch in LowerWin64_i128OP.
2020-08-05 16:04:00 -07:00
Arthur Eubanks
d30f886c6b [MSSA][NewPM] Handle tests with -print-memoryssa
-print-memoryssa in legacy PM is print<memoryssa> in NPM.
Pin tests with -print-memoryssa to legacy PM.
Add corresponding tests for NPM where missing.
This fixes "unknown pass name 'print-memoryssa'".

Some tests still fail in Analysis/MemorySSA due to other passes that
haven't been ported.

pr43427.ll and pr43438.ll required adding -aa-pipeline=basic-aa,
-loop-simplify (since it doesn't run on legacy PM by default), and
decrementing some of the MemoryPhi numbers.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D85333
2020-08-05 15:59:45 -07:00
Craig Topper
a04fa612fc [X86] Disable copy elision in LowerMemArgument for scalarized vectors when the loc VT is a different size than the original element.
For example a v4f16 argument is scalarized to 4 i32 values. So
the values are spread out instead of being packed tightly like
in the original vector.

Fixes PR47000.
2020-08-05 15:44:54 -07:00
Craig Topper
ce39c28b26 [X86] Add test case for PR47000. NFC 2020-08-05 15:44:53 -07:00
Greg Clayton
4e442757fd Add verification for DW_AT_decl_file and DW_AT_call_file.
LTO builds have been creating invalid DWARF and one of the errors was a file index that was out of bounds. "llvm-dwarfdump --verify" will check all file indexes for line tables already, but there are no checks for the validity of file indexes in attributes.

The verification will verify if there is a DW_AT_decl_file/DW_AT_call_file that:
- there is a line table for the compile unit
- the file index is valid
- the encoding is appropriate

Tests are added that test all of the above conditions.

Differential Revision: https://reviews.llvm.org/D84817
2020-08-05 15:30:13 -07:00
Sanjay Patel
66e8f4d8a3 [InstCombine] fold icmp with 'mul nsw/nuw' and constant operands
This also removes a more specific fold that only handled icmp with 0.

https://rise4fun.com/Alive/sdM9

  Name: mul nsw with icmp eq
  Pre: (C1 != 0) && (C2 % C1) == 0
  %a = mul nsw i8 %x, C1
  %r = icmp eq i8 %a, C2
    =>
  %r = icmp eq i8 %x, C2 / C1

  Name: mul nuw with icmp eq
  Pre: (C1 != 0) && (C2 %u C1) == 0
  %a = mul nuw i8 %x, C1
  %r = icmp eq i8 %a, C2
    =>
  %r = icmp eq i8 %x, C2 /u C1

  Name: mul nsw with icmp ne
  Pre: (C1 != 0) && (C2 % C1) == 0
  %a = mul nsw i8 %x, C1
  %r = icmp ne i8 %a, C2
    =>
  %r = icmp ne i8 %x, C2 / C1

  Name: mul nuw with icmp ne
  Pre: (C1 != 0) && (C2 %u C1) == 0
  %a = mul nuw i8 %x, C1
  %r = icmp ne i8 %a, C2
    =>
  %r = icmp ne i8 %x, C2 /u C1
2020-08-05 17:29:32 -04:00
Sanjay Patel
ecb0d3537f [InstCombine] add tests for icmp with mul nsw/nuw; NFC 2020-08-05 17:07:22 -04:00
Stanislav Mekhanoshin
9fb2aa5948 [AMDGPU] Scavenge temp reg for AGPR spill
Differential Revision: https://reviews.llvm.org/D85234
2020-08-05 13:29:19 -07:00
Rahman Lavaee
3a9a3691ee [Propeller]: Use a descriptive temporary symbol name for the end of the basic block.
This patch changes the functionality of AsmPrinter to name the basic block end labels as LBB_END${i}_${j}, with ${i} being the identifier for the function and ${j} being the identifier for the basic block. The new naming scheme is consistent with how basic block labels are named (.LBB${i}_{j}), and how function end symbol are named (.Lfunc_end${i}) and helps to write stronger tests for the upcoming patch for BB-Info section (as proposed in https://lists.llvm.org/pipermail/llvm-dev/2020-July/143512.html). The end label is used with basicblock-labels (BB-Info section in future) and basicblock-sections to compute the size of basic blocks and basic block sections, respectively. For BB sections, the section containing the entry basic block will not have a BB end label since it already gets the function end-label.
This label is cached for every basic block (CachedEndMCSymbol) like the label for the basic block (CachedMCSymbol).

Differential Revision: https://reviews.llvm.org/D83885
2020-08-05 13:17:19 -07:00
Matt Arsenault
21c0f36dab AMDGPU: Correct prolog SP initialization logic
Having callees that will read SP is not the only reason we need to
reference the stack pointer.
2020-08-05 15:47:53 -04:00
Stanislav Mekhanoshin
d688e1d62e [AMDGPU] gfx1031 target
Differential Revision: https://reviews.llvm.org/D85337
2020-08-05 12:36:26 -07:00
Arthur Eubanks
021e51ea42 [NewPM][LoopRotate] Rename rotate -> loop-rotate
To match legacy pass name.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D85338
2020-08-05 12:25:01 -07:00
Matt Arsenault
933fc1e514 AMDGPU: Eliminate BUFFER_ATOMIC_PK_ADD_F16 node
This is redundant with the other no return buffer atomic node, and we
don't really need a separate type profile for it.
2020-08-05 15:16:51 -04:00
Matt Morehouse
1a65e8de72 Revert "Add libFuzzer shared object build output"
This reverts commit 98d91aecb26a51225242332e73ed454c0f6cac5e since it
breaks on platforms without libstdc++.
2020-08-05 12:11:24 -07:00
Roman Lebedev
7ffd2f8403 [InstCombine] Negator: -(cond ? x : -x) --> cond ? -x : x
We were errneously only doing that for old-style abs/nabs,
but we have no such legality check on the condition of the select.

https://rise4fun.com/Alive/xBHS
2020-08-05 21:47:30 +03:00
Roman Lebedev
d294e25a25 [NFC][InstCombine] Add tests for negation of old-style [n]abs, select-of-op-vs-negation-of-op 2020-08-05 21:47:30 +03:00
Matt Arsenault
5a840a0920 AMDGPU: Refactor buffer atomic intrinsic lowering
Move raw/struct buffer atomic lowering to separate functions. This
avoids a long nested switch, and simplifies a future patch.
2020-08-05 14:44:55 -04:00
Matt Arsenault
d2f7f2d117 AMDGPU: Remove leftover test 2020-08-05 14:43:21 -04:00
Matt Arsenault
d0a70f671e AMDGPU: Fix verifier error with undef source producing s_bitset*
This needs to preserve the undef flag.
2020-08-05 14:42:20 -04:00
Sanjay Patel
82aa9a6b56 [InstSimplify] fold icmp with mul nsw and constant operands
https://rise4fun.com/Alive/slvl

  Name: mul nsw with icmp eq
  Pre: (C2 % C1) != 0
  %a = mul nsw i8 %x, C1
  %r = icmp eq i8 %a, C2
    =>
  %r = false

  Name: mul nsw with icmp ne
  Pre: (C2 % C1) != 0
  %a = mul nsw i8 %x, C1
  %r = icmp ne i8 %a, C2
    =>
  %r = true

Follow-up to the 'nuw' variation added with:
rGf879c9b79621
2020-08-05 14:38:39 -04:00
Sanjay Patel
60815c576a [InstSimplify] fold icmp with mul nuw and constant operands
https://rise4fun.com/Alive/pZEr

  Name: mul nuw with icmp eq
  Pre: (C2 %u C1) != 0
  %a = mul nuw i8 %x, C1
  %r = icmp eq i8 %a, C2
    =>
  %r = false

  Name: mul nuw with icmp ne
  Pre: (C2 %u C1) != 0
  %a = mul nuw i8 %x, C1
  %r = icmp ne i8 %a, C2
    =>
  %r = true

There are potentially several other transforms we need to add based on:
D51625
...but it doesn't look like there was follow-up to that patch.
2020-08-05 14:32:17 -04:00
Sanjay Patel
f3548b0c21 [InstSimplify] add vector tests for icmp with mul nuw; NFC
Also, the naming was off on a couple of tests.
2020-08-05 14:32:17 -04:00
Valentin Clement
103e9a5021 [flang][NFC] Unify OpenMP and OpenACC structure checker
This patch remove duplicated code between the check-omp-structure and the check-acc-structure
and unify it into a check-directive-structure templated class.

Reviewed By: kiranchandramohan, sscalpone, ichoyjx

Differential Revision: https://reviews.llvm.org/D85104
2020-08-05 14:25:49 -04:00
Paul C. Anagnostopoulos
acac4007fb Remove Olesen from LLVM code owners
I contacted Jakob Olesen about TableGen and he replied that he is no longer involved with the project.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D84958
2020-08-05 11:12:10 -07:00
Evgenii Stepanov
03cf51be93 [msan] Remove readnone and friends from call sites.
MSan removes readnone/readonly and similar attributes from callees,
because after MSan instrumentation those attributes no longer apply.

This change removes the attributes from call sites, as well.

Failing to do this may cause DSE of paramTLS stores before calls to
readonly/readnone functions.

Differential Revision: https://reviews.llvm.org/D85259
2020-08-05 10:34:45 -07:00
Simon Pilgrim
3820bb5f51 [X86][SSE] Fold 128-bit PACK(EXTEND(X),EXTEND(Y)) -> CONCAT(X,Y) subvectors
This is seen in the sub-128-bit vector trunc(ext()) of comparison results

Fixes pr46585.ll regression in D66004
2020-08-05 18:27:40 +01:00
Jordan Rupprecht
eb9074b6d8 Revert "[LoopVectorizer] Inloop vector reductions"
This reverts commit e9761688e41cb979a1fa6a79eb18145a75104933. It breaks the build:

```
~/src/llvm-project/llvm/lib/Analysis/IVDescriptors.cpp:868:10: error: no viable conversion from returned value of type 'SmallVector<[...], 8>' to function return type 'SmallVector<[...], 4>'
  return ReductionOperations;
```
2020-08-05 10:24:15 -07:00
Mircea Trofin
3bd1a7f753 [TFUtils] Expose untyped accessor to evaluation result tensors
These were implementation detail, but become necessary for generic data
copying.

Also added const variations to them, and move assignment, since we had a
move ctor (and the move assignment helps in a subsequent patch).

Differential Revision: https://reviews.llvm.org/D85262
2020-08-05 10:22:45 -07:00
David Green
8e671cc375 [LoopVectorizer] Inloop vector reductions
Arm MVE has multiple instructions such as VMLAVA.s8, which (in this
case) can take two 128bit vectors, sign extend the inputs to i32,
multiplying them together and sum the result into a 32bit general
purpose register. So taking 16 i8's as inputs, they can multiply and
accumulate the result into a single i32 without any rounding/truncating
along the way. There are also reduction instructions for plain integer
add and min/max, and operations that sum into a pair of 32bit registers
together treated as a 64bit integer (even though MVE does not have a
plain 64bit addition instruction). So giving the vectorizer the ability
to use these instructions both enables us to vectorize at higher
bitwidths, and to vectorize things we previously could not.

In order to do that we need a way to represent that the reduction
operation, specified with a llvm.experimental.vector.reduce when
vectorizing for Arm, occurs inside the loop not after it like most
reductions. This patch attempts to do that, teaching the vectorizer
about in-loop reductions. It does this through a vplan recipe
representing the reductions that the original chain of reduction
operations is replaced by. Cost modelling is currently just done through
a prefersInloopReduction TTI hook (which follows in a later patch).

Differential Revision: https://reviews.llvm.org/D75069
2020-08-05 18:14:05 +01:00
Roman Lebedev
48d27e2425 [NFC][InstCombine] Negator: include all the needed headers, IWYU 2020-08-05 20:12:36 +03:00
Roman Lebedev
9d97444457 [InstCombine] Negator: 0 - (X + Y) --> (-X) - Y iff a single operand negated
This was the most obvious regression in
f5df5cd5586ae9cfb2d9e53704dfc76f47aff149.f5df5cd5586ae9cfb2d9e53704dfc76f47aff149

We really don't want to do this if the original/outermost subtraction
isn't a negation, and therefore doesn't go away - just sinking negation
isn't a win. We are actually appear to be missing folds so hoist it.

https://rise4fun.com/Alive/tiVe
2020-08-05 20:01:13 +03:00
Roman Lebedev
7d3d3d3ab7 [NFC][InstCombine] Tests for negation of add w/ single negatible operand 2020-08-05 20:01:13 +03:00
Sanjay Patel
b11ddc51b9 [InstSimplify] add tests for icmp with 'mul nuw' operand; NFC 2020-08-05 12:46:45 -04:00
Matt Morehouse
31a4f48675 Add libFuzzer shared object build output
This change adds a CMake rule to produce shared object versions of
libFuzzer (no-main). Like the static library versions, these shared
libraries have a copy of libc++ statically linked in. For i386 we don't
link with libc++ since i386 does not support mixing position-
independent and non-position-independent code in the same library.

Patch By: IanPudney

Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D84947
2020-08-05 09:03:22 -07:00
Lang Hames
7d59db37b7 [JITLink][AArch64] Handle addends on PAGE21 / PAGEOFF12 relocations. 2020-08-05 08:50:46 -07:00
Lang Hames
633245f148 [JITLink][AArch64] Improve debug output for addend relocations. 2020-08-05 08:50:46 -07:00
Sanjay Patel
fb7a244b8e [InstSimplify] reduce code duplication in simplifyICmpWithMinMax(); NFC 2020-08-05 11:39:28 -04:00
Hans Wennborg
c3fca9996d Bump forgotten version nbr in llvm/docs/conf.py 2020-08-05 17:11:59 +02:00