5 Commits

Author	SHA1	Message	Date
Hal Finkel	71772b9747	Add ppc440 itin. entries for LdStSTD* ... llvm-svn: 153844	2012-04-01 19:23:04 +00:00
Hal Finkel	42a487282a	Split the LdStGeneral PPC itin. class into LdStLoad and LdStStore. ... Loads and stores can have different pipeline behavior, especially on embedded chips. This change allows those differences to be expressed. Except for the 440 scheduler, there are no functionality changes. On the 440, the latency adjustment is only by one cycle, and so this probably does not affect much. Nevertheless, it will make a larger difference in the future and this removes a FIXME from the 440 itin. llvm-svn: 153821	2012-04-01 04:44:16 +00:00
Jia Liu	b077b6085d	Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. ... llvm-svn: 150878	2012-02-18 12:03:15 +00:00
Hal Finkel	df4af2dd0b	Remove >80-col line and unicode ... llvm-svn: 142209	2011-10-17 18:10:08 +00:00
Hal Finkel	b128cda81b	Add PPC 440 scheduler and some associated tests (new files) ... llvm-svn: 142171	2011-10-17 04:03:55 +00:00