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Commit Graph

92239 Commits

Author SHA1 Message Date
Nicolai Haehnle
fe1657d8ae Add writeonly IR attribute
Summary:
This complements the earlier addition of IntrWriteMem and IntrWriteArgMem
LLVM intrinsic properties, see D18291.

Also start using the attribute for memset, memcpy, and memmove intrinsics,
and remove their special-casing in BasicAliasAnalysis.

Reviewers: reames, joker.eph

Subscribers: joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D18714

llvm-svn: 274485
2016-07-04 08:01:29 +00:00
Craig Topper
6251c76efd [CodeGen] Make the code that detects a if a shuffle is really a concatenation of the inputs more general purpose.
We can now handle concatenation of each source multiple times. The previous code just checked for each source to appear once in either order.

This also now handles an entire source vector sized piece having undef indices correctly. We now concat with UNDEF instead of using one of the sources. This is responsible for the test case change.

llvm-svn: 274483
2016-07-04 06:19:35 +00:00
NAKAMURA Takumi
98594bd08a Reformat blank lines.
llvm-svn: 274481
2016-07-04 01:26:33 +00:00
NAKAMURA Takumi
fe5e236058 Reformat comment lines.
llvm-svn: 274480
2016-07-04 01:26:27 +00:00
NAKAMURA Takumi
a06a555342 Untabify.
llvm-svn: 274479
2016-07-04 01:26:21 +00:00
NAKAMURA Takumi
a31d1fbf96 Reformat.
llvm-svn: 274478
2016-07-04 01:26:14 +00:00
Simon Pilgrim
118ec6d74f [X86] Add shuffle mask rescaling helper function. NFCI.
llvm-svn: 274476
2016-07-03 21:28:17 +00:00
Simon Pilgrim
e64c39cd38 [X86][AVX2] Merge unary permute matching behind the same V2.isUndef() condition. NFCI.
llvm-svn: 274474
2016-07-03 20:39:42 +00:00
Simon Pilgrim
3dde4af99b [X86][AVX512] Add support for 512-bit shuffle lowering to VPERMPD/VPERMQ
llvm-svn: 274473
2016-07-03 19:50:06 +00:00
Craig Topper
eba1935efe [CodeGen] Teach OR combine of shuffles involving zero vectors to better handle undef indices.
Undef indices can now be treated as zeros. Or if its undef ORed with zero, we will keep the undef.

llvm-svn: 274472
2016-07-03 19:37:12 +00:00
Haicheng Wu
166c92ee8a [MBB] add a missing corner case in UpdateTerminator()
After the block placement, if a block ends with a conditional branch, but the
next block is not its successor. The conditional branch should be changed to
unconditional branch.  This patch fixes PR28307, PR28297, PR28402.

Differential Revision: http://reviews.llvm.org/D21811

llvm-svn: 274470
2016-07-03 19:14:17 +00:00
Simon Pilgrim
247f2d0cc4 [X86][AVX512] Add support for VPERMPD/VPERMQ masked shuffle comments
llvm-svn: 274469
2016-07-03 18:40:24 +00:00
Simon Pilgrim
3b5b221899 [X86][AVX512] Add support for 512-bit shuffle decoding of VPERMPD/VPERMQ
llvm-svn: 274468
2016-07-03 18:27:37 +00:00
Simon Pilgrim
c0b0937d9c [X86][AVX] Renamed VPERMILPI shuffle comment macros to be more specific
llvm-svn: 274467
2016-07-03 18:02:43 +00:00
Simon Pilgrim
23dabb7405 [X86][AVX512] Add support for VPALIGNR/PSHUFD/PSHUFHW/PSHUFLW masked shuffle comments
llvm-svn: 274466
2016-07-03 15:00:51 +00:00
Sanjay Patel
e0cb175859 [InstCombine] enable vector select of bools -> logic folds
llvm-svn: 274465
2016-07-03 14:34:39 +00:00
Simon Pilgrim
4cf63de5c0 [X86][AVX512] Add support for UNPCK masked shuffle comments
llvm-svn: 274464
2016-07-03 14:26:21 +00:00
Sanjay Patel
0bb3b6578a fix formatting; NFC
llvm-svn: 274463
2016-07-03 14:08:19 +00:00
Simon Pilgrim
43e311e6ea [X86][AVX512] Add support for VPERM/VSHUF masked shuffle comments
llvm-svn: 274462
2016-07-03 13:55:41 +00:00
Simon Pilgrim
f597b1e0e0 [X86][AVX512] Add support for PMOVZX masked shuffle comments
llvm-svn: 274461
2016-07-03 13:33:28 +00:00
Simon Pilgrim
ac1b38084a [X86][AVX512] Add support for masked shuffle comments
This patch adds support for including the avx512 mask register information in the mask/maskz versions of shuffle instruction comments.

This initial version just adds support for MOVDDUP/MOVSHDUP/MOVSLDUP to reduce the mass of test regenerations, other shuffle instructions can be added in due course.

Differential Revision: http://reviews.llvm.org/D21953

llvm-svn: 274459
2016-07-03 13:08:29 +00:00
Simon Pilgrim
2cd46cb92f [X86][AVX512] Add support for lowering shuffles to VPERMILPS
llvm-svn: 274458
2016-07-03 12:47:21 +00:00
Sean Silva
800f3b7b0d PR28400: Partly undo r274440 to bring test-suite back to life with the new PM
PR28400 seems to be not an isolated issue, but a general problem related
to caching analyses. We will need to discuss on llvm-dev.

A test case is in the PR.

llvm-svn: 274457
2016-07-03 03:35:06 +00:00
Sean Silva
e6edc30c06 [PM] Some preparatory refactoring to minimize the diff of D21921
llvm-svn: 274456
2016-07-03 03:35:03 +00:00
Sean Silva
145ca3d2aa Remove dead TLI arg of isKnownNonNull and propagate deadness. NFC.
This actually uncovered a surprisingly large chain of ultimately unused
TLI args.
From what I can gather, this argument is a remnant of when
isKnownNonNull would look at the TLI directly.
The current approach seems to be that InferFunctionAttrs runs early in
the pipeline and uses TLI to annotate the TLI-dependent non-null
information as return attributes.

This also removes the dependence of functionattrs on TLI altogether.

llvm-svn: 274455
2016-07-02 23:47:27 +00:00
Xinliang David Li
ad67ad9771 [PM] Port LoopAccessInfo analysis to new PM
It is implemented as a LoopAnalysis pass as 
discussed and agreed upon.

llvm-svn: 274452
2016-07-02 21:18:40 +00:00
Simon Pilgrim
4e90a308f9 Fix spelling.
llvm-svn: 274451
2016-07-02 20:21:39 +00:00
Simon Pilgrim
6cc33d7efb [X86][AVX512] Add support for lowering shuffles to VPERMILPD
llvm-svn: 274450
2016-07-02 20:20:12 +00:00
Sean Silva
16d8ee033a [PM] Some preparatory refactoring to minimize the diff of D21921
The main change here is just moving stuff to static functions.

llvm-svn: 274446
2016-07-02 19:12:56 +00:00
Sean Silva
4d55a50655 [PM] Preparatory cleanups to ArgumentPromotion.
This pulls some obvious changes out of http://reviews.llvm.org/D21921 to
minimize the diff.

llvm-svn: 274445
2016-07-02 18:59:51 +00:00
Simon Pilgrim
936b52c77b [X86][AVX512] Add support for 512-bit PSHUFB lowering
llvm-svn: 274444
2016-07-02 18:14:31 +00:00
Simon Pilgrim
4b2f2feb46 [X86][AVX512] Converted the MOVDDUP/MOVSLDUP/MOVSHDUP masked intrinsics to generic IR
llvm-svn: 274443
2016-07-02 17:16:41 +00:00
Sean Silva
18cd1f4c63 [PM] Fix a small typo from when I ported JumpThreading
llvm-svn: 274440
2016-07-02 16:16:44 +00:00
Simon Pilgrim
0a0e355aa2 [X86][AVX512] Autoupgrade the MOVDDUP/MOVSLDUP/MOVSHDUP intrinsics
llvm-svn: 274439
2016-07-02 14:42:35 +00:00
Benjamin Kramer
c0ec3fbf2f [DIBuilder] Remove dead code. NFC.
llvm-svn: 274438
2016-07-02 13:18:38 +00:00
Benjamin Kramer
41167ee895 [Hexagon] Create global std::map lazily.
This could of course be a simple binary search with no global state
involved at all if someone cares enough. Just don't make everyone
linking the hexagon backend pay for it on process startup and shutdown.

llvm-svn: 274437
2016-07-02 13:05:12 +00:00
Simon Pilgrim
cfd21c19ac [X86][AVX512] Add support for lowering shuffles to MOVDDUP/MOVSLDUP/MOVSHDUP
llvm-svn: 274436
2016-07-02 12:45:03 +00:00
Benjamin Kramer
37a7d5e6b0 Use arrays or initializer lists to feed ArrayRefs instead of SmallVector where possible.
No functionality change intended.

llvm-svn: 274431
2016-07-02 11:41:39 +00:00
Qin Zhao
e75e1b5f4a [esan|cfrag] Add counters for struct array accesses
Summary:
Adds one counter to the struct counter array for counting struct
array accesses.

Adds instrumentation to insert counter update for struct array
accesses.

Reviewers: aizatsky

Subscribers: llvm-commits, bruening, eugenis, kcc, zhaoqin, vitalybuka

Differential Revision: http://reviews.llvm.org/D21594

llvm-svn: 274420
2016-07-02 03:25:37 +00:00
Marcin Koscielnicki
ea7d0179fa [SystemZ] Move misplaced SystemZ::TDC to non-memory opcode range.
llvm-svn: 274417
2016-07-02 02:20:40 +00:00
Pirama Arumuga Nainar
5892fda7c5 Add RenderScript ArchType
Summary:
Add renderscript32 and renderscript64 ArchTypes.  This is to configure
the ABI requirement on 32-bit RenderScript that 'long' types have 64-bit
size and alignment.  64-bit RenderScript is the same as AArch64, but is
added here for completeness.

Reviewers: echristo, rsmith

Subscribers: aemerson, jfb, rampitec, dschuff, mehdi_amini, llvm-commits, srhines

Differential Revision: http://reviews.llvm.org/D21333

llvm-svn: 274412
2016-07-02 00:23:09 +00:00
Michael Kuperstein
42c218049d [PM] Port ConstantHoisting to the new Pass Manager
Differential Revision: http://reviews.llvm.org/D21945

llvm-svn: 274411
2016-07-02 00:16:47 +00:00
Reid Kleckner
f9656821ec [codeview] Set the Nested and Scoped ClassOptions based on the scope chain
These are set on both the declaration record and the definition record.

llvm-svn: 274410
2016-07-02 00:11:07 +00:00
Matt Arsenault
294cabfcf1 LoadStoreVectorizer: Fix warning about extra semicolon
llvm-svn: 274406
2016-07-01 23:26:54 +00:00
Matt Arsenault
eac30e95ea TII: Fix inlineasm size counting comments as insts
The main problem was counting comments on their own
line as instructions.

llvm-svn: 274405
2016-07-01 23:26:50 +00:00
Matt Arsenault
eebf8e822c PeepholeOptimizer: Relax assert
Allow implicit defs

llvm-svn: 274402
2016-07-01 23:15:06 +00:00
David Majnemer
d705d7cb59 [CodeView] Include the offset of nested members
Given something like:
  struct S {
    int a;
    struct { int b; };
  };

We would fail to give 'b' offset 4.  Instead, we would give it the
offset it has inside of it's struct.

llvm-svn: 274400
2016-07-01 23:12:48 +00:00
David Majnemer
0ef767bae6 [CodeView] Pretty print anonymous scopes
A namespace without a name should be written out as `anonymous
namespace' while a tag type without a name should be written out as
<unnamed-tag>.

llvm-svn: 274399
2016-07-01 23:12:45 +00:00
Matt Arsenault
164529a800 AMDGPU: Add feature for unaligned access
llvm-svn: 274398
2016-07-01 23:03:44 +00:00
Matt Arsenault
fcc3666c3b AMDGPU: Expand unaligned accesses early
Due to visit order problems, in the case of an unaligned copy
the legalized DAG fails to eliminate extra instructions introduced
by the expansion of both unaligned parts.

llvm-svn: 274397
2016-07-01 22:55:55 +00:00