Bill Wendling
fef33f1d24
Revert r137871. The loop simplify pass should require all exits from a loop that
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aren't from an indirect branch need to be dominated by the loop header.
llvm-svn: 137981
2011-08-18 21:10:01 +00:00
Bill Wendling
f3c0fabac7
Split out the updating of PHI nodes after splitting the BB into a separate
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function.
llvm-svn: 137979
2011-08-18 20:51:04 +00:00
Bill Wendling
dec05a3784
Use this fantzy ArrayRef thing to pass in the list of predecessors.
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llvm-svn: 137978
2011-08-18 20:39:32 +00:00
Akira Hatanaka
1876aadea7
Make IsShiftedMask a static function rather than defining it in an
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anonymous namespace.
llvm-svn: 137975
2011-08-18 20:07:42 +00:00
Nick Lewycky
0b43a027b3
The edge from DISubprogram to DICompileUnit has been removed in recent versions
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of debug info.
llvm-svn: 137972
2011-08-18 19:07:42 +00:00
Jim Grosbach
d14d4c0aa8
Thumb assembly parsing and encoding for CMP.
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llvm-svn: 137963
2011-08-18 18:08:29 +00:00
Bill Wendling
3fbc8471bb
Use static instead of anonymous namespace.
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llvm-svn: 137959
2011-08-18 17:57:57 +00:00
Jim Grosbach
088d205084
Thumb instructions CBZ and CBNZ are Thumb2, not THumb1.
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llvm-svn: 137956
2011-08-18 17:51:36 +00:00
Chris Lattner
8213fad390
Rip out the old StructType APIs as warned about on llvmdev last week.
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llvm-svn: 137953
2011-08-18 17:39:28 +00:00
Jim Grosbach
2f385f0f38
ARM Thumb blx instruction fixup has same data range as bl.
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These fixups are handled poorly in general, and should have a single
contiguous range of bits per fixup type, but that's not how they're
currently organized, so for now in complex ones like for blx, we just tell the
emitter it's OK for the fixup to munge any bit it wants.
llvm-svn: 137947
2011-08-18 16:57:50 +00:00
Jim Grosbach
58bd93312a
80 columns.
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llvm-svn: 137946
2011-08-18 16:50:45 +00:00
Bruno Cardoso Lopes
19359daff9
Clenup and fix encoding for Mips ins and ext instruction
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llvm-svn: 137943
2011-08-18 16:30:49 +00:00
Jim Grosbach
95db9c2dee
Add missing 'break'.
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llvm-svn: 137941
2011-08-18 16:08:39 +00:00
Richard Osborne
415c5ff412
Add intrinsics for SETEV, GETED, GETET.
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llvm-svn: 137938
2011-08-18 13:00:48 +00:00
Duncan Sands
345561fe99
Remove unused variable.
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llvm-svn: 137933
2011-08-18 08:13:18 +00:00
Bill Wendling
42b9a110e0
Split out the analysis updating code into a helper function. No intended
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functionality change.
llvm-svn: 137926
2011-08-18 05:25:23 +00:00
Bruno Cardoso Lopes
c174d8ac48
Cleanup vector logical ops in AVX and add use int versions for simple
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v2i64
llvm-svn: 137919
2011-08-18 02:11:34 +00:00
Devang Patel
43e799cc40
Dramatically speedup codegen prepare by a) avoiding use of dominator tree and b) doing a separate pass over dbg.value instructions.
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llvm-svn: 137908
2011-08-18 00:50:51 +00:00
Jim Grosbach
ed7d35c932
Remove extraneous newline from operand print method. PR10569.
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llvm-svn: 137900
2011-08-17 23:23:07 +00:00
Jim Grosbach
281f42444a
Clean up patterns for Thumb1 system instructions.
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llvm-svn: 137897
2011-08-17 23:08:57 +00:00
Akira Hatanaka
0af1edcce0
Changed definition of EXT and INS per Bruno's comments.
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llvm-svn: 137892
2011-08-17 22:59:46 +00:00
Jim Grosbach
b0e8cd2bfa
Thumb assembly parsing and encoding for B.
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llvm-svn: 137891
2011-08-17 22:57:40 +00:00
Devang Patel
e1be26fa38
Do not use DebugInfoFinder. Extract debug info directly from llvm.dbg.cu named mdnode.
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llvm-svn: 137890
2011-08-17 22:49:38 +00:00
Jim Grosbach
1b761bd2d5
Thumb assembly parsing and encoding for ASR.
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llvm-svn: 137889
2011-08-17 22:49:09 +00:00
Eli Friedman
775a316a06
Atomic load/store handling for the passes using memdep (GVN, DSE, memcpyopt).
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llvm-svn: 137888
2011-08-17 22:22:24 +00:00
Bruno Cardoso Lopes
82795e6b41
Fix PR10688. Add support for spliting 256-bit vector shifts when the
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shift amount is variable
llvm-svn: 137885
2011-08-17 22:12:20 +00:00
Jim Grosbach
43a8f9d908
Tidy up. 80 columns.
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llvm-svn: 137881
2011-08-17 21:58:18 +00:00
Bill Wendling
71ce55ffd7
Add the support in code-gen for the landingpad instruction lowering.
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The landingpad instruction is lowered into the EXCEPTIONADDR and EHSELECTION
SDNodes. The information from the landingpad instruction is harvested by the
'AddLandingPadInfo' function. The new EH uses the current EH scheme in the
back-end. This will change once we switch over to the new scheme. (Reviewed by
Jakob!)
llvm-svn: 137880
2011-08-17 21:56:44 +00:00
Jim Grosbach
3efc45bfad
ARM clean up the imm_sr operand class representation.
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Represent the operand value as it will be encoded in the instruction. This
allows removing the specialized encoder and decoder methods entirely. Add
an assembler match class while we're at it to lay groundwork for parsing the
thumb shift instructions.
llvm-svn: 137879
2011-08-17 21:51:27 +00:00
Bill Wendling
fa8d0e1aea
Disable PRE for landing pads.
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PRE needs the landing pads to have their critical edges split. Doing this for a
landing pad is non-trivial. Abandon the attempt to perform PRE when we come
across a landing pad. (Reviewed by Owen!)
llvm-svn: 137876
2011-08-17 21:32:02 +00:00
Bill Wendling
2b25bb15ec
Revert patch. Forgot a dependent commit.
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llvm-svn: 137875
2011-08-17 21:28:05 +00:00
Bill Wendling
99907420dd
Add the body of 'visitLandingPad'.
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This generates the SDNodes for the new exception handling scheme. It takes the
two values coming from the landingpad instruction and assigns them to the
EXCEPTIONADDR and EHSELECTION nodes.
llvm-svn: 137873
2011-08-17 21:25:14 +00:00
Bill Wendling
e626358c3c
Increment the insertion iterator to beyond the landingpad instruction.
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llvm-svn: 137872
2011-08-17 21:21:31 +00:00
Bill Wendling
094d34f377
Don't optimize the landing pad exit block.
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One way to exit the loop is through an unwind edge. However, that may involve
splitting the critical edge of the landing pad, which is non-trivial. Prevent
the transformation from rewriting the landing pad exit loop block.
llvm-svn: 137871
2011-08-17 21:20:43 +00:00
Bill Wendling
c8581928f3
Assert that we aren't trying to split the critical edge of a landing pad. Doing
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so requires more care than this generic algorithm should handle.
llvm-svn: 137866
2011-08-17 21:04:05 +00:00
Jim Grosbach
848a93ebdb
Fix predicate for imm1_32
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llvm-svn: 137865
2011-08-17 21:01:11 +00:00
Jim Grosbach
0115c6f75b
Thumb assembly parsing and encoding for ADR.
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llvm-svn: 137864
2011-08-17 20:37:40 +00:00
Bill Wendling
3566980062
Revert r137655. There is some question about whether the 'landingpad'
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instruction should be marked as potentially reading and/or writing memory.
llvm-svn: 137863
2011-08-17 20:36:44 +00:00
Jim Grosbach
11b5cccb63
80 columns.
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llvm-svn: 137857
2011-08-17 19:55:51 +00:00
Jim Grosbach
dab6d5ba20
Tidy up.
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llvm-svn: 137856
2011-08-17 19:53:53 +00:00
Bill Wendling
74c9f876d9
Modify for the new EH scheme.
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Things are much saner now. We no longer need to modify the laning pads, because
of the invariants we impose upon them. The only thing DwarfEHPrepare needs to do
is convert the 'resume' instruction into a call to '_Unwind_Resume'.
llvm-svn: 137855
2011-08-17 19:48:49 +00:00
Eli Friedman
6da9a85aaa
Revert r137781; I agree with Duncan's comment that the situation in question is clearly impossible given the current structure of the code.
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llvm-svn: 137853
2011-08-17 19:31:49 +00:00
Akira Hatanaka
6eb513003d
Add support for half-word unaligned loads and stores.
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llvm-svn: 137848
2011-08-17 18:49:18 +00:00
Jordy Rose
fd8dfd013b
Static fields require an out-of-line definition. Fix DynamicLibrary for real.
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llvm-svn: 137844
2011-08-17 18:38:42 +00:00
Owen Anderson
cae3d3381c
Be more careful in the Thumb decoder hooks to avoid walking off the end of the OpInfo array.
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llvm-svn: 137838
2011-08-17 18:14:48 +00:00
Eli Friedman
e1655eebc3
Silly mistake from r137777; restore significant isStructTy() checks. While here, be a bit more defensive
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with unknown instructions.
Fixes PR10687.
llvm-svn: 137836
2011-08-17 18:10:43 +00:00
Akira Hatanaka
60ccc76576
Move pattern matching for EXT and INS to post-legalization DAGCombine per Bruno's comment.
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llvm-svn: 137831
2011-08-17 17:45:08 +00:00
Owen Anderson
3146968039
Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment.
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Patch by James Molloy.
llvm-svn: 137830
2011-08-17 17:44:15 +00:00
Bruno Cardoso Lopes
98531dfd08
Introduce matching patterns for vbroadcast AVX instruction. The idea is to
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match splats in the form (splat (scalar_to_vector (load ...))) whenever
the load can be folded. All the logic and instruction emission is
working but because of PR8156, there are no ways to match loads, cause
they can never be folded for splats. Thus, the tests are XFAILed, but
I've tested and exercised all the logic using a relaxed version for
checking the foldable loads, as if the bug was already fixed. This
should work out of the box once PR8156 gets fixed since MayFoldLoad will
work as expected.
llvm-svn: 137810
2011-08-17 02:29:19 +00:00
Bruno Cardoso Lopes
e3bab71a4b
Update comments about vector splat handling in x86
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llvm-svn: 137808
2011-08-17 02:29:13 +00:00