//===-- RISCVScheduleV.td - RISCV Scheduling Definitions V -*- tablegen -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// /// Define scheduler resources associated with def operands. // 7. Vector Loads and Stores // 7.4. Vector Unit-Stride Instructions def WriteVLDE8 : SchedWrite; def WriteVLDE16 : SchedWrite; def WriteVLDE32 : SchedWrite; def WriteVLDE64 : SchedWrite; def WriteVSTE8 : SchedWrite; def WriteVSTE16 : SchedWrite; def WriteVSTE32 : SchedWrite; def WriteVSTE64 : SchedWrite; // 7.4.1. Vector Unit-Strided Mask def WriteVLDM : SchedWrite; def WriteVSTM : SchedWrite; // 7.5. Vector Strided Instructions def WriteVLDS8 : SchedWrite; def WriteVLDS16 : SchedWrite; def WriteVLDS32 : SchedWrite; def WriteVLDS64 : SchedWrite; def WriteVSTS8 : SchedWrite; def WriteVSTS16 : SchedWrite; def WriteVSTS32 : SchedWrite; def WriteVSTS64 : SchedWrite; // 7.6. Vector Indexed Instructions def WriteVLDUX8 : SchedWrite; def WriteVLDUX16 : SchedWrite; def WriteVLDUX32 : SchedWrite; def WriteVLDUX64 : SchedWrite; def WriteVLDOX8 : SchedWrite; def WriteVLDOX16 : SchedWrite; def WriteVLDOX32 : SchedWrite; def WriteVLDOX64 : SchedWrite; def WriteVSTUX8 : SchedWrite; def WriteVSTUX16 : SchedWrite; def WriteVSTUX32 : SchedWrite; def WriteVSTUX64 : SchedWrite; def WriteVSTOX8 : SchedWrite; def WriteVSTOX16 : SchedWrite; def WriteVSTOX32 : SchedWrite; def WriteVSTOX64 : SchedWrite; // 7.7. Vector Unit-stride Fault-Only-First Loads def WriteVLDFF8 : SchedWrite; def WriteVLDFF16 : SchedWrite; def WriteVLDFF32 : SchedWrite; def WriteVLDFF64 : SchedWrite; // 7.9. Vector Whole Register Instructions def WriteVLD1R8 : SchedWrite; def WriteVLD1R16 : SchedWrite; def WriteVLD1R32 : SchedWrite; def WriteVLD1R64 : SchedWrite; def WriteVLD2R8 : SchedWrite; def WriteVLD2R16 : SchedWrite; def WriteVLD2R32 : SchedWrite; def WriteVLD2R64 : SchedWrite; def WriteVLD4R8 : SchedWrite; def WriteVLD4R16 : SchedWrite; def WriteVLD4R32 : SchedWrite; def WriteVLD4R64 : SchedWrite; def WriteVLD8R8 : SchedWrite; def WriteVLD8R16 : SchedWrite; def WriteVLD8R32 : SchedWrite; def WriteVLD8R64 : SchedWrite; def WriteVST1R : SchedWrite; def WriteVST2R : SchedWrite; def WriteVST4R : SchedWrite; def WriteVST8R : SchedWrite; // 11. Vector Integer Arithmetic Instructions // 11.1. Vector Single-Width Integer Add and Subtract // 11.5. Vector Bitwise Logical Instructions def WriteVIALUV : SchedWrite; def WriteVIALUX : SchedWrite; def WriteVIALUI : SchedWrite; // 11.2. Vector Widening Integer Add/Subtract def WriteVIWALUV : SchedWrite; def WriteVIWALUX : SchedWrite; def WriteVIWALUI : SchedWrite; // 11.3. Vector Integer Extension def WriteVExtV : SchedWrite; // 11.4. Vector Integer Arithmetic with Carry or Borrow Instructions def WriteVICALUV : SchedWrite; def WriteVICALUX : SchedWrite; def WriteVICALUI : SchedWrite; // 11.6. Vector Single-Width Bit Shift Instructions def WriteVShiftV : SchedWrite; def WriteVShiftX : SchedWrite; def WriteVShiftI : SchedWrite; // 11.7. Vector Narrowing Integer Right Shift Instructions def WriteVNShiftV : SchedWrite; def WriteVNShiftX : SchedWrite; def WriteVNShiftI : SchedWrite; // 11.8. Vector Integer Comparison Instructions // 11.9. Vector Integer Min/Max Instructions def WriteVICmpV : SchedWrite; def WriteVICmpX : SchedWrite; def WriteVICmpI : SchedWrite; // 11.10. Vector Single-Width Integer Multiply Instructions def WriteVIMulV : SchedWrite; def WriteVIMulX : SchedWrite; // 11.11. Vector Integer Divide Instructions def WriteVIDivV : SchedWrite; def WriteVIDivX : SchedWrite; // 11.12. Vector Widening Integer Multiply Instructions def WriteVIWMulV : SchedWrite; def WriteVIWMulX : SchedWrite; // 11.13. Vector Single-Width Integer Multiply-Add Instructions def WriteVIMulAddV : SchedWrite; def WriteVIMulAddX : SchedWrite; // 11.14. Vector Widening Integer Multiply-Add Instructions def WriteVIWMulAddV : SchedWrite; def WriteVIWMulAddX : SchedWrite; // 11.15. Vector Integer Merge Instructions def WriteVIMergeV : SchedWrite; def WriteVIMergeX : SchedWrite; def WriteVIMergeI : SchedWrite; // 11.16. Vector Integer Move Instructions def WriteVIMovV : SchedWrite; def WriteVIMovX : SchedWrite; def WriteVIMovI : SchedWrite; // 12. Vector Fixed-Point Arithmetic Instructions // 12.1. Vector Single-Width Saturating Add and Subtract def WriteVSALUV : SchedWrite; def WriteVSALUX : SchedWrite; def WriteVSALUI : SchedWrite; // 12.2. Vector Single-Width Averaging Add and Subtract def WriteVAALUV : SchedWrite; def WriteVAALUX : SchedWrite; // 12.3. Vector Single-Width Fractional Multiply with Rounding and Saturation def WriteVSMulV : SchedWrite; def WriteVSMulX : SchedWrite; // 12.4. Vector Single-Width Scaling Shift Instructions def WriteVSShiftV : SchedWrite; def WriteVSShiftX : SchedWrite; def WriteVSShiftI : SchedWrite; // 12.5. Vector Narrowing Fixed-Point Clip Instructions def WriteVNClipV : SchedWrite; def WriteVNClipX : SchedWrite; def WriteVNClipI : SchedWrite; // 13. Vector Floating-Point Instructions // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions def WriteVFALUV : SchedWrite; def WriteVFALUF : SchedWrite; // 13.3. Vector Widening Floating-Point Add/Subtract Instructions def WriteVFWALUV : SchedWrite; def WriteVFWALUF : SchedWrite; // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions def WriteVFMulV : SchedWrite; def WriteVFMulF : SchedWrite; def WriteVFDivV : SchedWrite; def WriteVFDivF : SchedWrite; // 13.5. Vector Widening Floating-Point Multiply def WriteVFWMulV : SchedWrite; def WriteVFWMulF : SchedWrite; // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions def WriteVFMulAddV : SchedWrite; def WriteVFMulAddF : SchedWrite; // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions def WriteVFWMulAddV : SchedWrite; def WriteVFWMulAddF : SchedWrite; // 13.8. Vector Floating-Point Square-Root Instruction def WriteVFSqrtV : SchedWrite; // 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction // 13.10. Vector Floating-Point Reciprocal Estimate Instruction def WriteVFRecpV : SchedWrite; // 13.11. Vector Floating-Point MIN/MAX Instructions // 13.13. Vector Floating-Point Compare Instructions def WriteVFCmpV : SchedWrite; def WriteVFCmpF : SchedWrite; // 13.12. Vector Floating-Point Sign-Injection Instructions def WriteVFSgnjV : SchedWrite; def WriteVFSgnjF : SchedWrite; // 13.14. Vector Floating-Point Classify Instruction def WriteVFClassV : SchedWrite; // 13.15. Vector Floating-Point Merge Instruction def WriteVFMergeV : SchedWrite; // 13.16. Vector Floating-Point Move Instruction def WriteVFMovV : SchedWrite; // 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions def WriteVFCvtIToFV : SchedWrite; def WriteVFCvtFToIV : SchedWrite; def WriteVFCvtFToFV : SchedWrite; // 13.18. Widening Floating-Point/Integer Type-Convert Instructions def WriteVFWCvtIToFV : SchedWrite; def WriteVFWCvtFToIV : SchedWrite; def WriteVFWCvtFToFV : SchedWrite; // 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions def WriteVFNCvtIToFV : SchedWrite; def WriteVFNCvtFToIV : SchedWrite; def WriteVFNCvtFToFV : SchedWrite; // 14. Vector Reduction Operations // 14.1. Vector Single-Width Integer Reduction Instructions def WriteVIRedV : SchedWrite; // 14.2. Vector Widening Integer Reduction Instructions def WriteVIWRedV : SchedWrite; // 14.3. Vector Single-Width Floating-Point Reduction Instructions def WriteVFRedV : SchedWrite; def WriteVFRedOV : SchedWrite; // 14.4. Vector Widening Floating-Point Reduction Instructions def WriteVFWRedV : SchedWrite; def WriteVFWRedOV : SchedWrite; // 15. Vector Mask Instructions // 15.1. Vector Mask-Register Logical Instructions def WriteVMALUV : SchedWrite; // 15.2. Vector Mask Population Count def WriteVMPopV : SchedWrite; // 15.3. Vector Find-First-Set Mask Bit def WriteVMFFSV : SchedWrite; // 15.4. Vector Set-Before-First Mask Bit // 15.5. Vector Set-Including-First Mask Bit // 15.6. Vector Set-only-First Mask Bit def WriteVMSFSV : SchedWrite; // 15.8. Vector Iota Instruction def WriteVMIotV : SchedWrite; // 15.9. Vector Element Index Instruction def WriteVMIdxV : SchedWrite; // 16. Vector Permutation Instructions // 16.1. Integer Scalar Move Instructions def WriteVIMovVX : SchedWrite; def WriteVIMovXV : SchedWrite; // 16.2. Floating-Point Scalar Move Instructions def WriteVFMovVF : SchedWrite; def WriteVFMovFV : SchedWrite; // 16.3. Vector Slide Instructions def WriteVISlideX : SchedWrite; def WriteVISlideI : SchedWrite; def WriteVISlide1X : SchedWrite; def WriteVFSlide1F : SchedWrite; // 16.4. Vector Register Gather Instructions def WriteVGatherV : SchedWrite; def WriteVGatherX : SchedWrite; def WriteVGatherI : SchedWrite; // 16.5. Vector Compress Instruction def WriteVCompressV : SchedWrite; // 16.6. Whole Vector Register Move def WriteVMov1V : SchedWrite; def WriteVMov2V : SchedWrite; def WriteVMov4V : SchedWrite; def WriteVMov8V : SchedWrite; //===----------------------------------------------------------------------===// /// Define scheduler resources associated with use operands. // 7. Vector Loads and Stores def ReadVLDX : SchedRead; def ReadVSTX : SchedRead; // 7.4. Vector Unit-Stride Instructions def ReadVSTE8V : SchedRead; def ReadVSTE16V : SchedRead; def ReadVSTE32V : SchedRead; def ReadVSTE64V : SchedRead; // 7.4.1. Vector Unit-Strided Mask def ReadVSTM : SchedRead; // 7.5. Vector Strided Instructions def ReadVLDSX : SchedRead; def ReadVSTSX : SchedRead; def ReadVSTS8V : SchedRead; def ReadVSTS16V : SchedRead; def ReadVSTS32V : SchedRead; def ReadVSTS64V : SchedRead; // 7.6. Vector Indexed Instructions def ReadVLDUXV : SchedRead; def ReadVLDOXV : SchedRead; def ReadVSTUX8 : SchedRead; def ReadVSTUX16 : SchedRead; def ReadVSTUX32 : SchedRead; def ReadVSTUX64 : SchedRead; def ReadVSTUXV : SchedRead; def ReadVSTUX8V : SchedRead; def ReadVSTUX16V : SchedRead; def ReadVSTUX32V : SchedRead; def ReadVSTUX64V : SchedRead; def ReadVSTOX8 : SchedRead; def ReadVSTOX16 : SchedRead; def ReadVSTOX32 : SchedRead; def ReadVSTOX64 : SchedRead; def ReadVSTOXV : SchedRead; def ReadVSTOX8V : SchedRead; def ReadVSTOX16V : SchedRead; def ReadVSTOX32V : SchedRead; def ReadVSTOX64V : SchedRead; // 7.9. Vector Whole Register Instructions def ReadVST1R : SchedRead; def ReadVST2R : SchedRead; def ReadVST4R : SchedRead; def ReadVST8R : SchedRead; // 11. Vector Integer Arithmetic Instructions // 11.1. Vector Single-Width Integer Add and Subtract // 11.5. Vector Bitwise Logical Instructions def ReadVIALUV : SchedRead; def ReadVIALUX : SchedRead; // 11.2. Vector Widening Integer Add/Subtract def ReadVIWALUV : SchedRead; def ReadVIWALUX : SchedRead; // 11.3. Vector Integer Extension def ReadVExtV : SchedRead; // 11.4. Vector Integer Arithmetic with Carry or Borrow Instructions def ReadVIALUCV : SchedRead; def ReadVIALUCX : SchedRead; // 11.6. Vector Single-Width Bit Shift Instructions def ReadVShiftV : SchedRead; def ReadVShiftX : SchedRead; // 11.7. Vector Narrowing Integer Right Shift Instructions def ReadVNShiftV : SchedRead; def ReadVNShiftX : SchedRead; // 11.8. Vector Integer Comparison Instructions // 11.9. Vector Integer Min/Max Instructions def ReadVICmpV : SchedRead; def ReadVICmpX : SchedRead; // 11.10. Vector Single-Width Integer Multiply Instructions def ReadVIMulV : SchedRead; def ReadVIMulX : SchedRead; // 11.11. Vector Integer Divide Instructions def ReadVIDivV : SchedRead; def ReadVIDivX : SchedRead; // 11.12. Vector Widening Integer Multiply Instructions def ReadVIWMulV : SchedRead; def ReadVIWMulX : SchedRead; // 11.13. Vector Single-Width Integer Multiply-Add Instructions def ReadVIMulAddV : SchedRead; def ReadVIMulAddX : SchedRead; // 11.14. Vector Widening Integer Multiply-Add Instructions def ReadVIWMulAddV : SchedRead; def ReadVIWMulAddX : SchedRead; // 11.15. Vector Integer Merge Instructions def ReadVIMergeV : SchedRead; def ReadVIMergeX : SchedRead; // 11.16. Vector Integer Move Instructions def ReadVIMovV : SchedRead; def ReadVIMovX : SchedRead; // 12. Vector Fixed-Point Arithmetic Instructions // 12.1. Vector Single-Width Saturating Add and Subtract def ReadVSALUV : SchedRead; def ReadVSALUX : SchedRead; // 12.2. Vector Single-Width Averaging Add and Subtract def ReadVAALUV : SchedRead; def ReadVAALUX : SchedRead; // 12.3. Vector Single-Width Fractional Multiply with Rounding and Saturation def ReadVSMulV : SchedRead; def ReadVSMulX : SchedRead; // 12.4. Vector Single-Width Scaling Shift Instructions def ReadVSShiftV : SchedRead; def ReadVSShiftX : SchedRead; // 12.5. Vector Narrowing Fixed-Point Clip Instructions def ReadVNClipV : SchedRead; def ReadVNClipX : SchedRead; // 13. Vector Floating-Point Instructions // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions def ReadVFALUV : SchedRead; def ReadVFALUF : SchedRead; // 13.3. Vector Widening Floating-Point Add/Subtract Instructions def ReadVFWALUV : SchedRead; def ReadVFWALUF : SchedRead; // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions def ReadVFMulV : SchedRead; def ReadVFMulF : SchedRead; def ReadVFDivV : SchedRead; def ReadVFDivF : SchedRead; // 13.5. Vector Widening Floating-Point Multiply def ReadVFWMulV : SchedRead; def ReadVFWMulF : SchedRead; // 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions def ReadVFMulAddV : SchedRead; def ReadVFMulAddF : SchedRead; // 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions def ReadVFWMulAddV : SchedRead; def ReadVFWMulAddF : SchedRead; // 13.8. Vector Floating-Point Square-Root Instruction def ReadVFSqrtV : SchedRead; // 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction // 13.10. Vector Floating-Point Reciprocal Estimate Instruction def ReadVFRecpV : SchedRead; // 13.11. Vector Floating-Point MIN/MAX Instructions // 13.13. Vector Floating-Point Compare Instructions def ReadVFCmpV : SchedRead; def ReadVFCmpF : SchedRead; // 13.12. Vector Floating-Point Sign-Injection Instructions def ReadVFSgnjV : SchedRead; def ReadVFSgnjF : SchedRead; // 13.14. Vector Floating-Point Classify Instruction def ReadVFClassV : SchedRead; // 13.15. Vector Floating-Point Merge Instruction def ReadVFMergeV : SchedRead; def ReadVFMergeF : SchedRead; // 13.16. Vector Floating-Point Move Instruction def ReadVFMovF : SchedRead; // 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions def ReadVFCvtIToFV : SchedRead; def ReadVFCvtFToIV : SchedRead; // 13.18. Widening Floating-Point/Integer Type-Convert Instructions def ReadVFWCvtIToFV : SchedRead; def ReadVFWCvtFToIV : SchedRead; def ReadVFWCvtFToFV : SchedRead; // 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions def ReadVFNCvtIToFV : SchedRead; def ReadVFNCvtFToIV : SchedRead; def ReadVFNCvtFToFV : SchedRead; // 14. Vector Reduction Operations // 14.1. Vector Single-Width Integer Reduction Instructions def ReadVIRedV : SchedRead; def ReadVIRedV0 : SchedRead; // 14.2. Vector Widening Integer Reduction Instructions def ReadVIWRedV : SchedRead; def ReadVIWRedV0 : SchedRead; // 14.3. Vector Single-Width Floating-Point Reduction Instructions def ReadVFRedV : SchedRead; def ReadVFRedV0 : SchedRead; def ReadVFRedOV : SchedRead; def ReadVFRedOV0 : SchedRead; // 14.4. Vector Widening Floating-Point Reduction Instructions def ReadVFWRedV : SchedRead; def ReadVFWRedV0 : SchedRead; def ReadVFWRedOV : SchedRead; def ReadVFWRedOV0 : SchedRead; // 15. Vector Mask Instructions // 15.1. Vector Mask-Register Logical Instructions def ReadVMALUV : SchedRead; // 15.2. Vector Mask Population Count def ReadVMPopV : SchedRead; // 15.3. Vector Find-First-Set Mask Bit def ReadVMFFSV : SchedRead; // 15.4. Vector Set-Before-First Mask Bit // 15.5. Vector Set-Including-First Mask Bit // 15.6. Vector Set-only-First Mask Bit def ReadVMSFSV : SchedRead; // 15.8. Vector Iota Instruction def ReadVMIotV : SchedRead; // 16. Vector Permutation Instructions // 16.1. Integer Scalar Move Instructions def ReadVIMovVX : SchedRead; def ReadVIMovXV : SchedRead; def ReadVIMovXX : SchedRead; // 16.2. Floating-Point Scalar Move Instructions def ReadVFMovVF : SchedRead; def ReadVFMovFV : SchedRead; def ReadVFMovFX : SchedRead; // 16.3. Vector Slide Instructions def ReadVISlideV : SchedRead; def ReadVISlideX : SchedRead; def ReadVFSlideV : SchedRead; def ReadVFSlideF : SchedRead; // 16.4. Vector Register Gather Instructions def ReadVGatherV : SchedRead; def ReadVGatherX : SchedRead; // 16.5. Vector Compress Instruction def ReadVCompressV : SchedRead; // 16.6. Whole Vector Register Move def ReadVMov1V : SchedRead; def ReadVMov2V : SchedRead; def ReadVMov4V : SchedRead; def ReadVMov8V : SchedRead; // Others def ReadVMask : SchedRead; //===----------------------------------------------------------------------===// /// Define default scheduler resources for V. multiclass UnsupportedSchedV { let Unsupported = true in { // 7. Vector Loads and Stores def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; // 12. Vector Integer Arithmetic Instructions def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; // 13. Vector Fixed-Point Arithmetic Instructions def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; // 14. Vector Floating-Point Instructions def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; // 15. Vector Reduction Operations def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; // 16. Vector Mask Instructions def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; // 17. Vector Permutation Instructions def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; def : WriteRes; // 7. Vector Loads and Stores def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; // 12. Vector Integer Arithmetic Instructions def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; // 13. Vector Fixed-Point Arithmetic Instructions def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; // 14. Vector Floating-Point Instructions def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; // 15. Vector Reduction Operations def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; // 16. Vector Mask Instructions def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; // 17. Vector Permutation Instructions def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; def : ReadAdvance; // Others def : ReadAdvance; } // Unsupported } // UnsupportedSchedV