# This file tests the scenario: ISEL RX, RY, RZ, CR (X != 0 && Y != 0, Z != 0) # RUN: llc -ppc-gen-isel=false -run-pass ppc-expand-isel -o - %s | FileCheck %s --- | target datalayout = "E-m:e-i64:64-n32:64" target triple = "powerpc64-unknown-linux-gnu" define signext i32 @testExpandISEL(i32 signext %i, i32 signext %j) { entry: %cmp = icmp sgt i32 %i, 0 %add = add nsw i32 %i, 1 %cond = select i1 %cmp, i32 %add, i32 %j ret i32 %cond } ... --- name: testExpandISEL alignment: 4 exposesReturnsTwice: false legalized: false regBankSelected: false selected: false tracksRegLiveness: true liveins: - { reg: '$x3' } - { reg: '$x4' } - { reg: '$x5' } frameInfo: isFrameAddressTaken: false isReturnAddressTaken: false hasStackMap: false hasPatchPoint: false stackSize: 0 offsetAdjustment: 0 maxAlignment: 0 adjustsStack: false hasCalls: false maxCallFrameSize: 0 hasOpaqueSPAdjustment: false hasVAStart: false hasMustTailInVarArgFunc: false body: | bb.0.entry: liveins: $x3, $x4, $x5 $r4 = ADDI $r3, 1 $cr0 = CMPWI $r3, 0 $r5 = ISEL $r3, $r4, $cr0gt ; CHECK: BC $cr0gt, %[[TRUE:bb.[0-9]+]] ; CHECK: %[[FALSE:bb.[0-9]+]] ; CHECK: $r5 = ORI $r4, 0 ; CHECK: B %[[SUCCESSOR:bb.[0-9]+]] ; CHECK: [[TRUE]] ; CHECK: $r5 = ADDI $r3, 0 $x5 = EXTSW_32_64 $r5 ...