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ca9ceef593
This patch adds basic CSKY branch instructions and symbol address series instructions. Those two kinds of instruction have relationship between each other, and it involves much work about Fixups. For now, basic instructions are enabled except for disassembler support. We would support to generate basic codegen asm firstly and delay disassembler work later. Differential Revision: https://reviews.llvm.org/D95029
136 lines
4.8 KiB
C++
136 lines
4.8 KiB
C++
//===-- CSKYMCCodeEmitter.cpp - CSKY Code Emitter interface ---------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the CSKYMCCodeEmitter class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYMCCODEEMITTER_H
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#define LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYMCCODEEMITTER_H
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#include "CSKYMCExpr.h"
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#include "MCTargetDesc/CSKYFixupKinds.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCContext.h"
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namespace llvm {
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class CSKYMCCodeEmitter : public MCCodeEmitter {
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MCContext &Ctx;
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const MCInstrInfo &MII;
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public:
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CSKYMCCodeEmitter(MCContext &Ctx, const MCInstrInfo &MII)
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: Ctx(Ctx), MII(MII) {}
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~CSKYMCCodeEmitter() {}
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void encodeInstruction(const MCInst &Inst, raw_ostream &OS,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const override;
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// Generated by tablegen.
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uint64_t getBinaryCodeForInstr(const MCInst &MI,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// Default encoding method used by tablegen.
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unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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template <int shift = 0>
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unsigned getImmOpValue(const MCInst &MI, unsigned Idx,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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const MCOperand &MO = MI.getOperand(Idx);
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assert(MO.isImm() && "Unexpected MO type.");
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return (MO.getImm() >> shift);
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}
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unsigned getOImmOpValue(const MCInst &MI, unsigned Idx,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getImmShiftOpValue(const MCInst &MI, unsigned Idx,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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const MCOperand &MO = MI.getOperand(Idx);
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assert(MO.isImm() && "Unexpected MO type.");
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return 1 << MO.getImm();
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}
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MCFixupKind getTargetFixup(const MCExpr *Expr) const;
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template <llvm::CSKY::Fixups FIXUP>
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unsigned getBranchSymbolOpValue(const MCInst &MI, unsigned Idx,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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const MCOperand &MO = MI.getOperand(Idx);
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if (MO.isImm())
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return MO.getImm() >> 1;
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assert(MO.isExpr() && "Unexpected MO type.");
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MCFixupKind Kind = MCFixupKind(FIXUP);
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if (MO.getExpr()->getKind() == MCExpr::Target)
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Kind = getTargetFixup(MO.getExpr());
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Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
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return 0;
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}
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template <llvm::CSKY::Fixups FIXUP>
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unsigned getConstpoolSymbolOpValue(const MCInst &MI, unsigned Idx,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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const MCOperand &MO = MI.getOperand(Idx);
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assert(MO.isExpr() && "Unexpected MO type.");
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MCFixupKind Kind = MCFixupKind(FIXUP);
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if (MO.getExpr()->getKind() == MCExpr::Target)
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Kind = getTargetFixup(MO.getExpr());
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Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
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return 0;
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}
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unsigned getCallSymbolOpValue(const MCInst &MI, unsigned Idx,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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const MCOperand &MO = MI.getOperand(Idx);
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assert(MO.isExpr() && "Unexpected MO type.");
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MCFixupKind Kind = MCFixupKind(CSKY::fixup_csky_pcrel_imm26_scale2);
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if (MO.getExpr()->getKind() == MCExpr::Target)
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Kind = getTargetFixup(MO.getExpr());
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Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
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return 0;
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}
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unsigned getBareSymbolOpValue(const MCInst &MI, unsigned Idx,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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const MCOperand &MO = MI.getOperand(Idx);
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assert(MO.isExpr() && "Unexpected MO type.");
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MCFixupKind Kind = MCFixupKind(CSKY::fixup_csky_pcrel_imm18_scale2);
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if (MO.getExpr()->getKind() == MCExpr::Target)
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Kind = getTargetFixup(MO.getExpr());
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Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc()));
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return 0;
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}
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};
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} // namespace llvm
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#endif // LLVM_LIB_TARGET_CSKY_MCTARGETDESC_CSKYMCCODEEMITTER_H
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