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- Infrastructure for the target (i.e. build files, target triple etc.) - All of the target description TableGen file Authors: myhsu, m4yers, glaubitz Differential Revision: https://reviews.llvm.org/D88389
120 lines
4.1 KiB
TableGen
120 lines
4.1 KiB
TableGen
//===-- M68kCallingConv.td - Calling Conventions for M68k --*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This describes the calling conventions for the M68k architectures. These
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/// conventions assume Int to be 4 bytes and 4 byte aligned.
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///
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//===----------------------------------------------------------------------===//
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// TODO Verify C convention follows SysV M68K ABI
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class CCIfSubtarget<string F, CCAction A>
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: CCIf<!strconcat("static_cast<const M68kSubtarget &>"
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"(State.getMachineFunction().getSubtarget()).", F), A>;
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//===----------------------------------------------------------------------===//
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// Return Value Calling Conventions
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//===----------------------------------------------------------------------===//
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/// Return-value conventions common to all M68k CC's.
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def RetCC_M68kCommon : CallingConv<[
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]>;
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/// M68k C return convention.
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/// TODO: Return via address register
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def RetCC_M68k_C : CallingConv<[
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CCIfType<[i1], CCPromoteToType<i8>>,
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CCIfType<[i8], CCAssignToReg<[BD0, BD1]>>,
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CCIfType<[i16], CCAssignToReg<[WD0, WD1]>>,
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CCIfType<[i32], CCAssignToReg<[D0, D1]>>,
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CCDelegateTo<RetCC_M68kCommon>
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]>;
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/// M68k fastcc return convention.
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/// This convention allows to return up to 16 bytes in registers which can be
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/// split among 16 1-byte values or used for a single 16-byte value.
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/// TODO: Verify its functionality and write tests
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def RetCC_M68k_Fast : CallingConv<[
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CCIfType<[i1], CCPromoteToType<i8>>,
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CCIfType<[i8], CCAssignToReg<[BD0, BD1]>>,
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CCIfType<[i16], CCAssignToReg<[WD0, WD1, WA0, WA1]>>,
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CCIfType<[i32], CCAssignToReg<[D0, D1, A0, A1]>>,
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CCDelegateTo<RetCC_M68kCommon>
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]>;
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/// This is the root return-value convention for the M68k backend.
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def RetCC_M68k : CallingConv<[
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CCIfCC<"CallingConv::Fast", CCDelegateTo<RetCC_M68k_Fast>>,
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CCDelegateTo<RetCC_M68k_C>
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]>;
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//===----------------------------------------------------------------------===//
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// M68k C Calling Convention
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//===----------------------------------------------------------------------===//
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/// CC_M68k_Common - In all M68k calling conventions, extra integers and FP
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/// values are spilled on the stack.
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def CC_M68k_Common : CallingConv<[
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/// Handles byval parameters.
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CCIfByVal<CCPassByVal<4, 4>>,
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/// Integer values get stored in stack slots that are 4 bytes in
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/// size and 4-byte aligned.
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CCIfType<[i32], CCAssignToStack<4, 4>>
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]>;
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def CC_M68k_Fast : CallingConv<[
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/// Promote i1/i8/i16 arguments to i32.
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CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
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/// The 'nest' parameter, if any, is passed in A1.
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CCIfNest<CCAssignToReg<[A1]>>, // FIXME verify if this is correct
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/// Since M68k uses %An for pointers and we want them be passed in regs
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/// too we have to use custom function.
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CCIfType<[i32], CCCustom<"CC_M68k_Any_AssignToReg">>,
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/// Otherwise, same as everything else.
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CCDelegateTo<CC_M68k_Common>
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]>;
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def CC_M68k_C : CallingConv<[
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/// Promote i1/i8/i16 arguments to i32.
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CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
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/// The 'nest' parameter, if any, is passed in A1.
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CCIfNest<CCAssignToReg<[A1]>>, // FIXME verify if this is correct
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/// Use registers only if 'inreg' used and the call is not vararg
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CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[D0, D1]>>>>,
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// TODO: Support for 'sret'
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/// Otherwise, same as everything else.
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CCDelegateTo<CC_M68k_Common>
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]>;
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/// This is the root argument convention for the M68k backend.
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def CC_M68k : CallingConv<[
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CCIfCC<"CallingConv::Fast", CCDelegateTo<CC_M68k_Fast>>,
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CCDelegateTo<CC_M68k_C>
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]>;
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//===----------------------------------------------------------------------===//
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// Callee-saved Registers.
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//===----------------------------------------------------------------------===//
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def CSR_NoRegs : CalleeSavedRegs<(add)>;
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// A5 - BP
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// A6 - FP
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def CSR_STD : CalleeSavedRegs<(add D2, D3, D4, D5, D6, D7,
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A2, A3, A4, A5, A6)>;
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