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llvm-mirror/lib/Target/RISCV/AsmParser
Craig Topper 84de2a93a3 [RISCV] Teach constant materialization that it can use zext.w at the end with Zba to reduce number of instructions.
If the upper 32 bits are zero and bit 31 is set, we might be able to
use zext.w to fill in the zeros after using an lui and/or addi.

Most of this patch is plumbing the subtarget features into the constant
materialization.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D105509
2021-07-16 09:35:56 -07:00
..
CMakeLists.txt [RISCV] Merge Utils library into MCTargetDesc 2021-01-14 11:47:30 -08:00
RISCVAsmParser.cpp [RISCV] Teach constant materialization that it can use zext.w at the end with Zba to reduce number of instructions. 2021-07-16 09:35:56 -07:00