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ecf1f07299
This removes `exnref` type and `br_on_exn` instruction. This is effectively NFC because most uses of these were already removed in the previous CLs. Reviewed By: dschuff, tlively Differential Revision: https://reviews.llvm.org/D94041
189 lines
6.4 KiB
C++
189 lines
6.4 KiB
C++
//===-- WebAssemblyPeephole.cpp - WebAssembly Peephole Optimiztions -------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// Late peephole optimizations for WebAssembly.
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///
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "WebAssembly.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblySubtarget.h"
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#include "llvm/Analysis/TargetLibraryInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm-peephole"
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static cl::opt<bool> DisableWebAssemblyFallthroughReturnOpt(
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"disable-wasm-fallthrough-return-opt", cl::Hidden,
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cl::desc("WebAssembly: Disable fallthrough-return optimizations."),
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cl::init(false));
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namespace {
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class WebAssemblyPeephole final : public MachineFunctionPass {
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StringRef getPassName() const override {
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return "WebAssembly late peephole optimizer";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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AU.addRequired<TargetLibraryInfoWrapperPass>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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public:
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static char ID;
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WebAssemblyPeephole() : MachineFunctionPass(ID) {}
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};
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} // end anonymous namespace
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char WebAssemblyPeephole::ID = 0;
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INITIALIZE_PASS(WebAssemblyPeephole, DEBUG_TYPE,
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"WebAssembly peephole optimizations", false, false)
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FunctionPass *llvm::createWebAssemblyPeephole() {
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return new WebAssemblyPeephole();
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}
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/// If desirable, rewrite NewReg to a drop register.
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static bool maybeRewriteToDrop(unsigned OldReg, unsigned NewReg,
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MachineOperand &MO, WebAssemblyFunctionInfo &MFI,
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MachineRegisterInfo &MRI) {
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bool Changed = false;
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if (OldReg == NewReg) {
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Changed = true;
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Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
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MO.setReg(NewReg);
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MO.setIsDead();
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MFI.stackifyVReg(MRI, NewReg);
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}
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return Changed;
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}
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static bool maybeRewriteToFallthrough(MachineInstr &MI, MachineBasicBlock &MBB,
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const MachineFunction &MF,
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WebAssemblyFunctionInfo &MFI,
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MachineRegisterInfo &MRI,
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const WebAssemblyInstrInfo &TII) {
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if (DisableWebAssemblyFallthroughReturnOpt)
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return false;
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if (&MBB != &MF.back())
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return false;
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MachineBasicBlock::iterator End = MBB.end();
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--End;
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assert(End->getOpcode() == WebAssembly::END_FUNCTION);
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--End;
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if (&MI != &*End)
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return false;
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for (auto &MO : MI.explicit_operands()) {
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// If the operand isn't stackified, insert a COPY to read the operands and
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// stackify them.
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Register Reg = MO.getReg();
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if (!MFI.isVRegStackified(Reg)) {
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unsigned CopyLocalOpc;
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const TargetRegisterClass *RegClass = MRI.getRegClass(Reg);
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switch (RegClass->getID()) {
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case WebAssembly::I32RegClassID:
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CopyLocalOpc = WebAssembly::COPY_I32;
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break;
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case WebAssembly::I64RegClassID:
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CopyLocalOpc = WebAssembly::COPY_I64;
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break;
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case WebAssembly::F32RegClassID:
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CopyLocalOpc = WebAssembly::COPY_F32;
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break;
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case WebAssembly::F64RegClassID:
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CopyLocalOpc = WebAssembly::COPY_F64;
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break;
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case WebAssembly::V128RegClassID:
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CopyLocalOpc = WebAssembly::COPY_V128;
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break;
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case WebAssembly::FUNCREFRegClassID:
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CopyLocalOpc = WebAssembly::COPY_FUNCREF;
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break;
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case WebAssembly::EXTERNREFRegClassID:
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CopyLocalOpc = WebAssembly::COPY_EXTERNREF;
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break;
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default:
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llvm_unreachable("Unexpected register class for return operand");
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}
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Register NewReg = MRI.createVirtualRegister(RegClass);
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BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(CopyLocalOpc), NewReg)
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.addReg(Reg);
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MO.setReg(NewReg);
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MFI.stackifyVReg(MRI, NewReg);
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}
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}
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MI.setDesc(TII.get(WebAssembly::FALLTHROUGH_RETURN));
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return true;
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}
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bool WebAssemblyPeephole::runOnMachineFunction(MachineFunction &MF) {
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LLVM_DEBUG({
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dbgs() << "********** Peephole **********\n"
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<< "********** Function: " << MF.getName() << '\n';
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});
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MachineRegisterInfo &MRI = MF.getRegInfo();
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WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
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const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
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const WebAssemblyTargetLowering &TLI =
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*MF.getSubtarget<WebAssemblySubtarget>().getTargetLowering();
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auto &LibInfo =
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getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(MF.getFunction());
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bool Changed = false;
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for (auto &MBB : MF)
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for (auto &MI : MBB)
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switch (MI.getOpcode()) {
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default:
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break;
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case WebAssembly::CALL: {
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MachineOperand &Op1 = MI.getOperand(1);
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if (Op1.isSymbol()) {
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StringRef Name(Op1.getSymbolName());
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if (Name == TLI.getLibcallName(RTLIB::MEMCPY) ||
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Name == TLI.getLibcallName(RTLIB::MEMMOVE) ||
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Name == TLI.getLibcallName(RTLIB::MEMSET)) {
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LibFunc Func;
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if (LibInfo.getLibFunc(Name, Func)) {
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const auto &Op2 = MI.getOperand(2);
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if (!Op2.isReg())
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report_fatal_error("Peephole: call to builtin function with "
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"wrong signature, not consuming reg");
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MachineOperand &MO = MI.getOperand(0);
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Register OldReg = MO.getReg();
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Register NewReg = Op2.getReg();
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if (MRI.getRegClass(NewReg) != MRI.getRegClass(OldReg))
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report_fatal_error("Peephole: call to builtin function with "
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"wrong signature, from/to mismatch");
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Changed |= maybeRewriteToDrop(OldReg, NewReg, MO, MFI, MRI);
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}
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}
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}
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break;
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}
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// Optimize away an explicit void return at the end of the function.
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case WebAssembly::RETURN:
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Changed |= maybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII);
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break;
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}
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return Changed;
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}
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