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cbcd7a559a
These instructions read their inputs from fixed registers rather than using a modrm byte. We shouldn't require the user to list them when parsing assembly. This matches the GNU assembler. This patch adds InstAliases so we can accept either form. It also changes the printing code to use the form without registers. This will change the behavior of llvm-objdump, but should be consistent with binutils objdump. This also matches what we already do in LLVM for clzero and monitorx which also used fixed registers. I need to add and improve tests before this can be commited. The disassembler tests exist, but weren't checking the fixed register so they pass before and after this change. Fixes https://github.com/ClangBuiltLinux/linux/issues/1216 Differential Revision: https://reviews.llvm.org/D93524
73 lines
2.7 KiB
TableGen
73 lines
2.7 KiB
TableGen
//===-- X86InstrSVM.td - SVM Instruction Set Extension -----*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the instructions that make up the AMD SVM instruction
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// set.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// SVM instructions
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let SchedRW = [WriteSystem] in {
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// 0F 01 D9
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def VMMCALL : I<0x01, MRM_D9, (outs), (ins), "vmmcall", []>, TB;
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// 0F 01 DC
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def STGI : I<0x01, MRM_DC, (outs), (ins), "stgi", []>, TB;
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// 0F 01 DD
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def CLGI : I<0x01, MRM_DD, (outs), (ins), "clgi", []>, TB;
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// 0F 01 DE
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let Uses = [EAX] in
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def SKINIT : I<0x01, MRM_DE, (outs), (ins), "skinit", []>, TB;
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// 0F 01 D8
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let Uses = [EAX] in
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def VMRUN32 : I<0x01, MRM_D8, (outs), (ins), "vmrun", []>, TB,
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Requires<[Not64BitMode]>;
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let Uses = [RAX] in
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def VMRUN64 : I<0x01, MRM_D8, (outs), (ins), "vmrun", []>, TB,
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Requires<[In64BitMode]>;
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// 0F 01 DA
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let Uses = [EAX] in
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def VMLOAD32 : I<0x01, MRM_DA, (outs), (ins), "vmload", []>, TB,
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Requires<[Not64BitMode]>;
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let Uses = [RAX] in
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def VMLOAD64 : I<0x01, MRM_DA, (outs), (ins), "vmload", []>, TB,
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Requires<[In64BitMode]>;
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// 0F 01 DB
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let Uses = [EAX] in
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def VMSAVE32 : I<0x01, MRM_DB, (outs), (ins), "vmsave", []>, TB,
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Requires<[Not64BitMode]>;
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let Uses = [RAX] in
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def VMSAVE64 : I<0x01, MRM_DB, (outs), (ins), "vmsave", []>, TB,
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Requires<[In64BitMode]>;
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// 0F 01 DF
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let Uses = [EAX, ECX] in
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def INVLPGA32 : I<0x01, MRM_DF, (outs), (ins),
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"invlpga", []>, TB, Requires<[Not64BitMode]>;
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let Uses = [RAX, ECX] in
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def INVLPGA64 : I<0x01, MRM_DF, (outs), (ins),
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"invlpga", []>, TB, Requires<[In64BitMode]>;
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} // SchedRW
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def : InstAlias<"skinit\t{%eax|eax}", (SKINIT), 0>;
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def : InstAlias<"vmrun\t{%eax|eax}", (VMRUN32), 0>, Requires<[Not64BitMode]>;
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def : InstAlias<"vmrun\t{%rax|rax}", (VMRUN64), 0>, Requires<[In64BitMode]>;
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def : InstAlias<"vmload\t{%eax|eax}", (VMLOAD32), 0>, Requires<[Not64BitMode]>;
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def : InstAlias<"vmload\t{%rax|rax}", (VMLOAD64), 0>, Requires<[In64BitMode]>;
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def : InstAlias<"vmsave\t{%eax|eax}", (VMSAVE32), 0>, Requires<[Not64BitMode]>;
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def : InstAlias<"vmsave\t{%rax|rax}", (VMSAVE64), 0>, Requires<[In64BitMode]>;
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def : InstAlias<"invlpga\t{%eax, %ecx|eax, ecx}", (INVLPGA32), 0>, Requires<[Not64BitMode]>;
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def : InstAlias<"invlpga\t{%rax, %ecx|rax, ecx}", (INVLPGA64), 0>, Requires<[In64BitMode]>;
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