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https://github.com/RPCS3/llvm-mirror.git
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efa8f57b0d
Summary: Vector of the same value with few undefs will sill be considered "Bytewise" Reviewers: eugenis, pcc, jfb Reviewed By: jfb Subscribers: dexonsmith, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64031 llvm-svn: 365971
949 lines
27 KiB
C++
949 lines
27 KiB
C++
//===- ValueTrackingTest.cpp - ValueTracking tests ------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/AsmParser/Parser.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/InstIterator.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/KnownBits.h"
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#include "llvm/Support/SourceMgr.h"
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#include "gtest/gtest.h"
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using namespace llvm;
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namespace {
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class ValueTrackingTest : public testing::Test {
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protected:
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std::unique_ptr<Module> parseModule(StringRef Assembly) {
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SMDiagnostic Error;
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std::unique_ptr<Module> M = parseAssemblyString(Assembly, Error, Context);
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std::string errMsg;
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raw_string_ostream os(errMsg);
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Error.print("", os);
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EXPECT_TRUE(M) << os.str();
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return M;
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}
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void parseAssembly(StringRef Assembly) {
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M = parseModule(Assembly);
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ASSERT_TRUE(M);
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Function *F = M->getFunction("test");
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ASSERT_TRUE(F) << "Test must have a function @test";
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if (!F)
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return;
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A = nullptr;
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for (inst_iterator I = inst_begin(F), E = inst_end(F); I != E; ++I) {
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if (I->hasName()) {
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if (I->getName() == "A")
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A = &*I;
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}
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}
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ASSERT_TRUE(A) << "@test must have an instruction %A";
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}
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LLVMContext Context;
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std::unique_ptr<Module> M;
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Instruction *A = nullptr;
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};
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class MatchSelectPatternTest : public ValueTrackingTest {
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protected:
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void expectPattern(const SelectPatternResult &P) {
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Value *LHS, *RHS;
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Instruction::CastOps CastOp;
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SelectPatternResult R = matchSelectPattern(A, LHS, RHS, &CastOp);
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EXPECT_EQ(P.Flavor, R.Flavor);
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EXPECT_EQ(P.NaNBehavior, R.NaNBehavior);
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EXPECT_EQ(P.Ordered, R.Ordered);
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}
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};
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class ComputeKnownBitsTest : public ValueTrackingTest {
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protected:
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void expectKnownBits(uint64_t Zero, uint64_t One) {
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auto Known = computeKnownBits(A, M->getDataLayout());
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ASSERT_FALSE(Known.hasConflict());
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EXPECT_EQ(Known.One.getZExtValue(), One);
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EXPECT_EQ(Known.Zero.getZExtValue(), Zero);
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}
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};
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}
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TEST_F(MatchSelectPatternTest, SimpleFMin) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ult float %a, 5.0\n"
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" %A = select i1 %1, float %a, float 5.0\n"
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" ret float %A\n"
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"}\n");
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_NAN, false});
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}
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TEST_F(MatchSelectPatternTest, SimpleFMax) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ogt float %a, 5.0\n"
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" %A = select i1 %1, float %a, float 5.0\n"
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" ret float %A\n"
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"}\n");
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_OTHER, true});
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}
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TEST_F(MatchSelectPatternTest, SwappedFMax) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp olt float 5.0, %a\n"
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" %A = select i1 %1, float %a, float 5.0\n"
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" ret float %A\n"
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"}\n");
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_OTHER, false});
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}
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TEST_F(MatchSelectPatternTest, SwappedFMax2) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp olt float %a, 5.0\n"
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" %A = select i1 %1, float 5.0, float %a\n"
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" ret float %A\n"
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"}\n");
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_NAN, false});
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}
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TEST_F(MatchSelectPatternTest, SwappedFMax3) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ult float %a, 5.0\n"
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" %A = select i1 %1, float 5.0, float %a\n"
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" ret float %A\n"
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"}\n");
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_OTHER, true});
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}
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TEST_F(MatchSelectPatternTest, FastFMin) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp nnan olt float %a, 5.0\n"
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" %A = select i1 %1, float %a, float 5.0\n"
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" ret float %A\n"
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"}\n");
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_ANY, false});
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}
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TEST_F(MatchSelectPatternTest, FMinConstantZero) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ole float %a, 0.0\n"
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" %A = select i1 %1, float %a, float 0.0\n"
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" ret float %A\n"
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"}\n");
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// This shouldn't be matched, as %a could be -0.0.
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expectPattern({SPF_UNKNOWN, SPNB_NA, false});
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}
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TEST_F(MatchSelectPatternTest, FMinConstantZeroNsz) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp nsz ole float %a, 0.0\n"
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" %A = select i1 %1, float %a, float 0.0\n"
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" ret float %A\n"
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"}\n");
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// But this should be, because we've ignored signed zeroes.
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_OTHER, true});
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}
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TEST_F(MatchSelectPatternTest, FMinMismatchConstantZero1) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp olt float -0.0, %a\n"
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" %A = select i1 %1, float 0.0, float %a\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_NAN, true});
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}
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TEST_F(MatchSelectPatternTest, FMinMismatchConstantZero2) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ogt float %a, -0.0\n"
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" %A = select i1 %1, float 0.0, float %a\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_NAN, false});
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}
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TEST_F(MatchSelectPatternTest, FMinMismatchConstantZero3) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp olt float 0.0, %a\n"
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" %A = select i1 %1, float -0.0, float %a\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_NAN, true});
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}
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TEST_F(MatchSelectPatternTest, FMinMismatchConstantZero4) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ogt float %a, 0.0\n"
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" %A = select i1 %1, float -0.0, float %a\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_NAN, false});
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}
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TEST_F(MatchSelectPatternTest, FMinMismatchConstantZero5) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ogt float -0.0, %a\n"
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" %A = select i1 %1, float %a, float 0.0\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_OTHER, false});
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}
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TEST_F(MatchSelectPatternTest, FMinMismatchConstantZero6) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp olt float %a, -0.0\n"
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" %A = select i1 %1, float %a, float 0.0\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_OTHER, true});
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}
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TEST_F(MatchSelectPatternTest, FMinMismatchConstantZero7) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ogt float 0.0, %a\n"
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" %A = select i1 %1, float %a, float -0.0\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_OTHER, false});
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}
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TEST_F(MatchSelectPatternTest, FMinMismatchConstantZero8) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp olt float %a, 0.0\n"
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" %A = select i1 %1, float %a, float -0.0\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_OTHER, true});
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}
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TEST_F(MatchSelectPatternTest, FMaxMismatchConstantZero1) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ogt float -0.0, %a\n"
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" %A = select i1 %1, float 0.0, float %a\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_NAN, true});
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}
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TEST_F(MatchSelectPatternTest, FMaxMismatchConstantZero2) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp olt float %a, -0.0\n"
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" %A = select i1 %1, float 0.0, float %a\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_NAN, false});
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}
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TEST_F(MatchSelectPatternTest, FMaxMismatchConstantZero3) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ogt float 0.0, %a\n"
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" %A = select i1 %1, float -0.0, float %a\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_NAN, true});
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}
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TEST_F(MatchSelectPatternTest, FMaxMismatchConstantZero4) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp olt float %a, 0.0\n"
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" %A = select i1 %1, float -0.0, float %a\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_NAN, false});
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}
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TEST_F(MatchSelectPatternTest, FMaxMismatchConstantZero5) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp olt float -0.0, %a\n"
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" %A = select i1 %1, float %a, float 0.0\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_OTHER, false});
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}
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TEST_F(MatchSelectPatternTest, FMaxMismatchConstantZero6) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ogt float %a, -0.0\n"
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" %A = select i1 %1, float %a, float 0.0\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_OTHER, true});
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}
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TEST_F(MatchSelectPatternTest, FMaxMismatchConstantZero7) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp olt float 0.0, %a\n"
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" %A = select i1 %1, float %a, float -0.0\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_OTHER, false});
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}
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TEST_F(MatchSelectPatternTest, FMaxMismatchConstantZero8) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ogt float %a, 0.0\n"
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" %A = select i1 %1, float %a, float -0.0\n"
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" ret float %A\n"
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"}\n");
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// The sign of zero doesn't matter in fcmp.
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_OTHER, true});
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}
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TEST_F(MatchSelectPatternTest, FMinMismatchConstantZeroVecUndef) {
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parseAssembly(
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"define <2 x float> @test(<2 x float> %a) {\n"
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" %1 = fcmp ogt <2 x float> %a, <float -0.0, float -0.0>\n"
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" %A = select <2 x i1> %1, <2 x float> <float undef, float 0.0>, <2 x float> %a\n"
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" ret <2 x float> %A\n"
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"}\n");
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// An undef in a vector constant can not be back-propagated for this analysis.
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expectPattern({SPF_UNKNOWN, SPNB_NA, false});
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}
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TEST_F(MatchSelectPatternTest, FMaxMismatchConstantZeroVecUndef) {
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parseAssembly(
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"define <2 x float> @test(<2 x float> %a) {\n"
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" %1 = fcmp ogt <2 x float> %a, zeroinitializer\n"
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" %A = select <2 x i1> %1, <2 x float> %a, <2 x float> <float -0.0, float undef>\n"
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" ret <2 x float> %A\n"
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"}\n");
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// An undef in a vector constant can not be back-propagated for this analysis.
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expectPattern({SPF_UNKNOWN, SPNB_NA, false});
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}
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TEST_F(MatchSelectPatternTest, VectorFMinimum) {
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parseAssembly(
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"define <4 x float> @test(<4 x float> %a) {\n"
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" %1 = fcmp ule <4 x float> %a, \n"
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" <float 5.0, float 5.0, float 5.0, float 5.0>\n"
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" %A = select <4 x i1> %1, <4 x float> %a,\n"
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" <4 x float> <float 5.0, float 5.0, float 5.0, float 5.0>\n"
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" ret <4 x float> %A\n"
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"}\n");
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// Check that pattern matching works on vectors where each lane has the same
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// unordered pattern.
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_NAN, false});
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}
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TEST_F(MatchSelectPatternTest, VectorFMinOtherOrdered) {
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parseAssembly(
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"define <4 x float> @test(<4 x float> %a) {\n"
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" %1 = fcmp ole <4 x float> %a, \n"
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" <float 5.0, float 5.0, float 5.0, float 5.0>\n"
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" %A = select <4 x i1> %1, <4 x float> %a,\n"
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" <4 x float> <float 5.0, float 5.0, float 5.0, float 5.0>\n"
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" ret <4 x float> %A\n"
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"}\n");
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// Check that pattern matching works on vectors where each lane has the same
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// ordered pattern.
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_OTHER, true});
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}
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TEST_F(MatchSelectPatternTest, VectorNotFMinimum) {
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parseAssembly(
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"define <4 x float> @test(<4 x float> %a) {\n"
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" %1 = fcmp ule <4 x float> %a, \n"
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" <float 5.0, float 0x7ff8000000000000, float 5.0, float 5.0>\n"
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" %A = select <4 x i1> %1, <4 x float> %a,\n"
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" <4 x float> <float 5.0, float 0x7ff8000000000000, float 5.0, float "
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"5.0>\n"
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" ret <4 x float> %A\n"
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"}\n");
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// The lane that contains a NaN (0x7ff80...) behaves like a
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// non-NaN-propagating min and the other lines behave like a NaN-propagating
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// min, so check that neither is returned.
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expectPattern({SPF_UNKNOWN, SPNB_NA, false});
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}
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TEST_F(MatchSelectPatternTest, VectorNotFMinZero) {
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parseAssembly(
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"define <4 x float> @test(<4 x float> %a) {\n"
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" %1 = fcmp ule <4 x float> %a, \n"
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" <float 5.0, float -0.0, float 5.0, float 5.0>\n"
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" %A = select <4 x i1> %1, <4 x float> %a,\n"
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" <4 x float> <float 5.0, float 0.0, float 5.0, float 5.0>\n"
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" ret <4 x float> %A\n"
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"}\n");
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// Always selects the second lane of %a if it is positive or negative zero, so
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// this is stricter than a min.
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expectPattern({SPF_UNKNOWN, SPNB_NA, false});
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}
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TEST_F(MatchSelectPatternTest, DoubleCastU) {
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parseAssembly(
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"define i32 @test(i8 %a, i8 %b) {\n"
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" %1 = icmp ult i8 %a, %b\n"
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" %2 = zext i8 %a to i32\n"
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" %3 = zext i8 %b to i32\n"
|
|
" %A = select i1 %1, i32 %2, i32 %3\n"
|
|
" ret i32 %A\n"
|
|
"}\n");
|
|
// We should be able to look through the situation where we cast both operands
|
|
// to the select.
|
|
expectPattern({SPF_UMIN, SPNB_NA, false});
|
|
}
|
|
|
|
TEST_F(MatchSelectPatternTest, DoubleCastS) {
|
|
parseAssembly(
|
|
"define i32 @test(i8 %a, i8 %b) {\n"
|
|
" %1 = icmp slt i8 %a, %b\n"
|
|
" %2 = sext i8 %a to i32\n"
|
|
" %3 = sext i8 %b to i32\n"
|
|
" %A = select i1 %1, i32 %2, i32 %3\n"
|
|
" ret i32 %A\n"
|
|
"}\n");
|
|
// We should be able to look through the situation where we cast both operands
|
|
// to the select.
|
|
expectPattern({SPF_SMIN, SPNB_NA, false});
|
|
}
|
|
|
|
TEST_F(MatchSelectPatternTest, DoubleCastBad) {
|
|
parseAssembly(
|
|
"define i32 @test(i8 %a, i8 %b) {\n"
|
|
" %1 = icmp ult i8 %a, %b\n"
|
|
" %2 = zext i8 %a to i32\n"
|
|
" %3 = sext i8 %b to i32\n"
|
|
" %A = select i1 %1, i32 %2, i32 %3\n"
|
|
" ret i32 %A\n"
|
|
"}\n");
|
|
// The cast types here aren't the same, so we cannot match an UMIN.
|
|
expectPattern({SPF_UNKNOWN, SPNB_NA, false});
|
|
}
|
|
|
|
TEST(ValueTracking, GuaranteedToTransferExecutionToSuccessor) {
|
|
StringRef Assembly =
|
|
"declare void @nounwind_readonly(i32*) nounwind readonly "
|
|
"declare void @nounwind_argmemonly(i32*) nounwind argmemonly "
|
|
"declare void @throws_but_readonly(i32*) readonly "
|
|
"declare void @throws_but_argmemonly(i32*) argmemonly "
|
|
"declare void @nounwind_willreturn(i32*) nounwind willreturn"
|
|
" "
|
|
"declare void @unknown(i32*) "
|
|
" "
|
|
"define void @f(i32* %p) { "
|
|
" call void @nounwind_readonly(i32* %p) "
|
|
" call void @nounwind_argmemonly(i32* %p) "
|
|
" call void @throws_but_readonly(i32* %p) "
|
|
" call void @throws_but_argmemonly(i32* %p) "
|
|
" call void @unknown(i32* %p) nounwind readonly "
|
|
" call void @unknown(i32* %p) nounwind argmemonly "
|
|
" call void @unknown(i32* %p) readonly "
|
|
" call void @unknown(i32* %p) argmemonly "
|
|
" call void @nounwind_willreturn(i32* %p)"
|
|
" ret void "
|
|
"} ";
|
|
|
|
LLVMContext Context;
|
|
SMDiagnostic Error;
|
|
auto M = parseAssemblyString(Assembly, Error, Context);
|
|
assert(M && "Bad assembly?");
|
|
|
|
auto *F = M->getFunction("f");
|
|
assert(F && "Bad assembly?");
|
|
|
|
auto &BB = F->getEntryBlock();
|
|
bool ExpectedAnswers[] = {
|
|
true, // call void @nounwind_readonly(i32* %p)
|
|
true, // call void @nounwind_argmemonly(i32* %p)
|
|
false, // call void @throws_but_readonly(i32* %p)
|
|
false, // call void @throws_but_argmemonly(i32* %p)
|
|
true, // call void @unknown(i32* %p) nounwind readonly
|
|
true, // call void @unknown(i32* %p) nounwind argmemonly
|
|
false, // call void @unknown(i32* %p) readonly
|
|
false, // call void @unknown(i32* %p) argmemonly
|
|
true, // call void @nounwind_willreturn(i32* %p)
|
|
false, // ret void
|
|
};
|
|
|
|
int Index = 0;
|
|
for (auto &I : BB) {
|
|
EXPECT_EQ(isGuaranteedToTransferExecutionToSuccessor(&I),
|
|
ExpectedAnswers[Index])
|
|
<< "Incorrect answer at instruction " << Index << " = " << I;
|
|
Index++;
|
|
}
|
|
}
|
|
|
|
TEST_F(ValueTrackingTest, ComputeNumSignBits_PR32045) {
|
|
parseAssembly(
|
|
"define i32 @test(i32 %a) {\n"
|
|
" %A = ashr i32 %a, -1\n"
|
|
" ret i32 %A\n"
|
|
"}\n");
|
|
EXPECT_EQ(ComputeNumSignBits(A, M->getDataLayout()), 1u);
|
|
}
|
|
|
|
// No guarantees for canonical IR in this analysis, so this just bails out.
|
|
TEST_F(ValueTrackingTest, ComputeNumSignBits_Shuffle) {
|
|
parseAssembly(
|
|
"define <2 x i32> @test() {\n"
|
|
" %A = shufflevector <2 x i32> undef, <2 x i32> undef, <2 x i32> <i32 0, i32 0>\n"
|
|
" ret <2 x i32> %A\n"
|
|
"}\n");
|
|
EXPECT_EQ(ComputeNumSignBits(A, M->getDataLayout()), 1u);
|
|
}
|
|
|
|
// No guarantees for canonical IR in this analysis, so a shuffle element that
|
|
// references an undef value means this can't return any extra information.
|
|
TEST_F(ValueTrackingTest, ComputeNumSignBits_Shuffle2) {
|
|
parseAssembly(
|
|
"define <2 x i32> @test(<2 x i1> %x) {\n"
|
|
" %sext = sext <2 x i1> %x to <2 x i32>\n"
|
|
" %A = shufflevector <2 x i32> %sext, <2 x i32> undef, <2 x i32> <i32 0, i32 2>\n"
|
|
" ret <2 x i32> %A\n"
|
|
"}\n");
|
|
EXPECT_EQ(ComputeNumSignBits(A, M->getDataLayout()), 1u);
|
|
}
|
|
|
|
TEST_F(ComputeKnownBitsTest, ComputeKnownBits) {
|
|
parseAssembly(
|
|
"define i32 @test(i32 %a, i32 %b) {\n"
|
|
" %ash = mul i32 %a, 8\n"
|
|
" %aad = add i32 %ash, 7\n"
|
|
" %aan = and i32 %aad, 4095\n"
|
|
" %bsh = shl i32 %b, 4\n"
|
|
" %bad = or i32 %bsh, 6\n"
|
|
" %ban = and i32 %bad, 4095\n"
|
|
" %A = mul i32 %aan, %ban\n"
|
|
" ret i32 %A\n"
|
|
"}\n");
|
|
expectKnownBits(/*zero*/ 4278190085u, /*one*/ 10u);
|
|
}
|
|
|
|
TEST_F(ComputeKnownBitsTest, ComputeKnownMulBits) {
|
|
parseAssembly(
|
|
"define i32 @test(i32 %a, i32 %b) {\n"
|
|
" %aa = shl i32 %a, 5\n"
|
|
" %bb = shl i32 %b, 5\n"
|
|
" %aaa = or i32 %aa, 24\n"
|
|
" %bbb = or i32 %bb, 28\n"
|
|
" %A = mul i32 %aaa, %bbb\n"
|
|
" ret i32 %A\n"
|
|
"}\n");
|
|
expectKnownBits(/*zero*/ 95u, /*one*/ 32u);
|
|
}
|
|
|
|
TEST_F(ComputeKnownBitsTest, ComputeKnownFshl) {
|
|
// fshl(....1111....0000, 00..1111........, 6)
|
|
// = 11....000000..11
|
|
parseAssembly(
|
|
"define i16 @test(i16 %a, i16 %b) {\n"
|
|
" %aa = shl i16 %a, 4\n"
|
|
" %bb = lshr i16 %b, 2\n"
|
|
" %aaa = or i16 %aa, 3840\n"
|
|
" %bbb = or i16 %bb, 3840\n"
|
|
" %A = call i16 @llvm.fshl.i16(i16 %aaa, i16 %bbb, i16 6)\n"
|
|
" ret i16 %A\n"
|
|
"}\n"
|
|
"declare i16 @llvm.fshl.i16(i16, i16, i16)\n");
|
|
expectKnownBits(/*zero*/ 1008u, /*one*/ 49155u);
|
|
}
|
|
|
|
TEST_F(ComputeKnownBitsTest, ComputeKnownFshr) {
|
|
// fshr(....1111....0000, 00..1111........, 26)
|
|
// = 11....000000..11
|
|
parseAssembly(
|
|
"define i16 @test(i16 %a, i16 %b) {\n"
|
|
" %aa = shl i16 %a, 4\n"
|
|
" %bb = lshr i16 %b, 2\n"
|
|
" %aaa = or i16 %aa, 3840\n"
|
|
" %bbb = or i16 %bb, 3840\n"
|
|
" %A = call i16 @llvm.fshr.i16(i16 %aaa, i16 %bbb, i16 26)\n"
|
|
" ret i16 %A\n"
|
|
"}\n"
|
|
"declare i16 @llvm.fshr.i16(i16, i16, i16)\n");
|
|
expectKnownBits(/*zero*/ 1008u, /*one*/ 49155u);
|
|
}
|
|
|
|
TEST_F(ComputeKnownBitsTest, ComputeKnownFshlZero) {
|
|
// fshl(....1111....0000, 00..1111........, 0)
|
|
// = ....1111....0000
|
|
parseAssembly(
|
|
"define i16 @test(i16 %a, i16 %b) {\n"
|
|
" %aa = shl i16 %a, 4\n"
|
|
" %bb = lshr i16 %b, 2\n"
|
|
" %aaa = or i16 %aa, 3840\n"
|
|
" %bbb = or i16 %bb, 3840\n"
|
|
" %A = call i16 @llvm.fshl.i16(i16 %aaa, i16 %bbb, i16 0)\n"
|
|
" ret i16 %A\n"
|
|
"}\n"
|
|
"declare i16 @llvm.fshl.i16(i16, i16, i16)\n");
|
|
expectKnownBits(/*zero*/ 15u, /*one*/ 3840u);
|
|
}
|
|
|
|
TEST_F(ComputeKnownBitsTest, ComputeKnownUAddSatLeadingOnes) {
|
|
// uadd.sat(1111...1, ........)
|
|
// = 1111....
|
|
parseAssembly(
|
|
"define i8 @test(i8 %a, i8 %b) {\n"
|
|
" %aa = or i8 %a, 241\n"
|
|
" %A = call i8 @llvm.uadd.sat.i8(i8 %aa, i8 %b)\n"
|
|
" ret i8 %A\n"
|
|
"}\n"
|
|
"declare i8 @llvm.uadd.sat.i8(i8, i8)\n");
|
|
expectKnownBits(/*zero*/ 0u, /*one*/ 240u);
|
|
}
|
|
|
|
TEST_F(ComputeKnownBitsTest, ComputeKnownUAddSatOnesPreserved) {
|
|
// uadd.sat(00...011, .1...110)
|
|
// = .......1
|
|
parseAssembly(
|
|
"define i8 @test(i8 %a, i8 %b) {\n"
|
|
" %aa = or i8 %a, 3\n"
|
|
" %aaa = and i8 %aa, 59\n"
|
|
" %bb = or i8 %b, 70\n"
|
|
" %bbb = and i8 %bb, 254\n"
|
|
" %A = call i8 @llvm.uadd.sat.i8(i8 %aaa, i8 %bbb)\n"
|
|
" ret i8 %A\n"
|
|
"}\n"
|
|
"declare i8 @llvm.uadd.sat.i8(i8, i8)\n");
|
|
expectKnownBits(/*zero*/ 0u, /*one*/ 1u);
|
|
}
|
|
|
|
TEST_F(ComputeKnownBitsTest, ComputeKnownUSubSatLHSLeadingZeros) {
|
|
// usub.sat(0000...0, ........)
|
|
// = 0000....
|
|
parseAssembly(
|
|
"define i8 @test(i8 %a, i8 %b) {\n"
|
|
" %aa = and i8 %a, 14\n"
|
|
" %A = call i8 @llvm.usub.sat.i8(i8 %aa, i8 %b)\n"
|
|
" ret i8 %A\n"
|
|
"}\n"
|
|
"declare i8 @llvm.usub.sat.i8(i8, i8)\n");
|
|
expectKnownBits(/*zero*/ 240u, /*one*/ 0u);
|
|
}
|
|
|
|
TEST_F(ComputeKnownBitsTest, ComputeKnownUSubSatRHSLeadingOnes) {
|
|
// usub.sat(........, 1111...1)
|
|
// = 0000....
|
|
parseAssembly(
|
|
"define i8 @test(i8 %a, i8 %b) {\n"
|
|
" %bb = or i8 %a, 241\n"
|
|
" %A = call i8 @llvm.usub.sat.i8(i8 %a, i8 %bb)\n"
|
|
" ret i8 %A\n"
|
|
"}\n"
|
|
"declare i8 @llvm.usub.sat.i8(i8, i8)\n");
|
|
expectKnownBits(/*zero*/ 240u, /*one*/ 0u);
|
|
}
|
|
|
|
TEST_F(ComputeKnownBitsTest, ComputeKnownUSubSatZerosPreserved) {
|
|
// usub.sat(11...011, .1...110)
|
|
// = ......0.
|
|
parseAssembly(
|
|
"define i8 @test(i8 %a, i8 %b) {\n"
|
|
" %aa = or i8 %a, 195\n"
|
|
" %aaa = and i8 %aa, 251\n"
|
|
" %bb = or i8 %b, 70\n"
|
|
" %bbb = and i8 %bb, 254\n"
|
|
" %A = call i8 @llvm.usub.sat.i8(i8 %aaa, i8 %bbb)\n"
|
|
" ret i8 %A\n"
|
|
"}\n"
|
|
"declare i8 @llvm.usub.sat.i8(i8, i8)\n");
|
|
expectKnownBits(/*zero*/ 2u, /*one*/ 0u);
|
|
}
|
|
|
|
class IsBytewiseValueTest : public ValueTrackingTest,
|
|
public ::testing::WithParamInterface<
|
|
std::pair<const char *, const char *>> {
|
|
protected:
|
|
};
|
|
|
|
const std::pair<const char *, const char *> IsBytewiseValueTests[] = {
|
|
{
|
|
"i8 0",
|
|
"i48* null",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"i48* undef",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"i8 zeroinitializer",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"i8 0",
|
|
},
|
|
{
|
|
"i8 -86",
|
|
"i8 -86",
|
|
},
|
|
{
|
|
"i8 -1",
|
|
"i8 -1",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"i16 undef",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"i16 0",
|
|
},
|
|
{
|
|
"",
|
|
"i16 7",
|
|
},
|
|
{
|
|
"i8 -86",
|
|
"i16 -21846",
|
|
},
|
|
{
|
|
"i8 -1",
|
|
"i16 -1",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"i48 0",
|
|
},
|
|
{
|
|
"i8 -1",
|
|
"i48 -1",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"i49 0",
|
|
},
|
|
{
|
|
"",
|
|
"i49 -1",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"half 0xH0000",
|
|
},
|
|
{
|
|
"i8 -85",
|
|
"half 0xHABAB",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"float 0.0",
|
|
},
|
|
{
|
|
"i8 -1",
|
|
"float 0xFFFFFFFFE0000000",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"double 0.0",
|
|
},
|
|
{
|
|
"i8 -15",
|
|
"double 0xF1F1F1F1F1F1F1F1",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"i16* undef",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"i16* inttoptr (i64 0 to i16*)",
|
|
},
|
|
{
|
|
"i8 -1",
|
|
"i16* inttoptr (i64 -1 to i16*)",
|
|
},
|
|
{
|
|
"i8 -86",
|
|
"i16* inttoptr (i64 -6148914691236517206 to i16*)",
|
|
},
|
|
{
|
|
"",
|
|
"i16* inttoptr (i48 -1 to i16*)",
|
|
},
|
|
{
|
|
"i8 -1",
|
|
"i16* inttoptr (i96 -1 to i16*)",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"[0 x i8] zeroinitializer",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"[0 x i8] undef",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"[5 x [0 x i8]] zeroinitializer",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"[5 x [0 x i8]] undef",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"[6 x i8] zeroinitializer",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"[6 x i8] undef",
|
|
},
|
|
{
|
|
"i8 1",
|
|
"[5 x i8] [i8 1, i8 1, i8 1, i8 1, i8 1]",
|
|
},
|
|
{
|
|
"",
|
|
"[5 x i64] [i64 1, i64 1, i64 1, i64 1, i64 1]",
|
|
},
|
|
{
|
|
"i8 -1",
|
|
"[5 x i64] [i64 -1, i64 -1, i64 -1, i64 -1, i64 -1]",
|
|
},
|
|
{
|
|
"",
|
|
"[4 x i8] [i8 1, i8 2, i8 1, i8 1]",
|
|
},
|
|
{
|
|
"i8 1",
|
|
"[4 x i8] [i8 1, i8 undef, i8 1, i8 1]",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"<6 x i8> zeroinitializer",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"<6 x i8> undef",
|
|
},
|
|
{
|
|
"i8 1",
|
|
"<5 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1>",
|
|
},
|
|
{
|
|
"",
|
|
"<5 x i64> <i64 1, i64 1, i64 1, i64 1, i64 1>",
|
|
},
|
|
{
|
|
"i8 -1",
|
|
"<5 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>",
|
|
},
|
|
{
|
|
"",
|
|
"<4 x i8> <i8 1, i8 1, i8 2, i8 1>",
|
|
},
|
|
{
|
|
"i8 5",
|
|
"<2 x i8> < i8 5, i8 undef >",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"[2 x [2 x i16]] zeroinitializer",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"[2 x [2 x i16]] undef",
|
|
},
|
|
{
|
|
"i8 -86",
|
|
"[2 x [2 x i16]] [[2 x i16] [i16 -21846, i16 -21846], "
|
|
"[2 x i16] [i16 -21846, i16 -21846]]",
|
|
},
|
|
{
|
|
"",
|
|
"[2 x [2 x i16]] [[2 x i16] [i16 -21846, i16 -21846], "
|
|
"[2 x i16] [i16 -21836, i16 -21846]]",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"{ } zeroinitializer",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"{ } undef",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"{ {}, {} } zeroinitializer",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"{ {}, {} } undef",
|
|
},
|
|
{
|
|
"i8 0",
|
|
"{i8, i64, i16*} zeroinitializer",
|
|
},
|
|
{
|
|
"i8 undef",
|
|
"{i8, i64, i16*} undef",
|
|
},
|
|
{
|
|
"i8 -86",
|
|
"{i8, i64, i16*} {i8 -86, i64 -6148914691236517206, i16* undef}",
|
|
},
|
|
{
|
|
"",
|
|
"{i8, i64, i16*} {i8 86, i64 -6148914691236517206, i16* undef}",
|
|
},
|
|
};
|
|
|
|
INSTANTIATE_TEST_CASE_P(IsBytewiseValueParamTests, IsBytewiseValueTest,
|
|
::testing::ValuesIn(IsBytewiseValueTests),);
|
|
|
|
TEST_P(IsBytewiseValueTest, IsBytewiseValue) {
|
|
auto M = parseModule(std::string("@test = global ") + GetParam().second);
|
|
GlobalVariable *GV = dyn_cast<GlobalVariable>(M->getNamedValue("test"));
|
|
Value *Actual = isBytewiseValue(GV->getInitializer(), M->getDataLayout());
|
|
std::string Buff;
|
|
raw_string_ostream S(Buff);
|
|
if (Actual)
|
|
S << *Actual;
|
|
EXPECT_EQ(GetParam().first, S.str());
|
|
}
|