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003518d973
Don't try to canonicalize loads to scalable vector types to loads of integers. This removes one assertion when trying to use a TypeSize as a parameter to DataLayout::isLegalInteger. It does not handle the second part of the function (which looks at bitcasts). This patch also contains a NFC fix for Load Analysis, where a variable initialization that would cause the same assertion is moved closer to its use. This allows us to run the new test for InstCombine without having to teach LocationSize to play nicely with scalable vectors. Differential Revision: https://reviews.llvm.org/D70075
481 lines
20 KiB
C++
481 lines
20 KiB
C++
//===- Loads.cpp - Local load analysis ------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines simple local analyses for load instructions.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/Loads.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/Analysis/ScalarEvolution.h"
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#include "llvm/Analysis/ScalarEvolutionExpressions.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/GlobalAlias.h"
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#include "llvm/IR/GlobalVariable.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Operator.h"
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#include "llvm/IR/Statepoint.h"
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using namespace llvm;
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static MaybeAlign getBaseAlign(const Value *Base, const DataLayout &DL) {
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if (const MaybeAlign PA = Base->getPointerAlignment(DL))
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return *PA;
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Type *const Ty = Base->getType()->getPointerElementType();
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if (!Ty->isSized())
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return None;
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return Align(DL.getABITypeAlignment(Ty));
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}
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static bool isAligned(const Value *Base, const APInt &Offset, Align Alignment,
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const DataLayout &DL) {
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if (MaybeAlign BA = getBaseAlign(Base, DL)) {
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const APInt APBaseAlign(Offset.getBitWidth(), BA->value());
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const APInt APAlign(Offset.getBitWidth(), Alignment.value());
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assert(APAlign.isPowerOf2() && "must be a power of 2!");
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return APBaseAlign.uge(APAlign) && !(Offset & (APAlign - 1));
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}
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return false;
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}
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/// Test if V is always a pointer to allocated and suitably aligned memory for
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/// a simple load or store.
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static bool isDereferenceableAndAlignedPointer(
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const Value *V, Align Alignment, const APInt &Size, const DataLayout &DL,
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const Instruction *CtxI, const DominatorTree *DT,
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SmallPtrSetImpl<const Value *> &Visited) {
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// Already visited? Bail out, we've likely hit unreachable code.
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if (!Visited.insert(V).second)
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return false;
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// Note that it is not safe to speculate into a malloc'd region because
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// malloc may return null.
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// bitcast instructions are no-ops as far as dereferenceability is concerned.
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if (const BitCastOperator *BC = dyn_cast<BitCastOperator>(V))
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return isDereferenceableAndAlignedPointer(BC->getOperand(0), Alignment,
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Size, DL, CtxI, DT, Visited);
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bool CheckForNonNull = false;
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APInt KnownDerefBytes(Size.getBitWidth(),
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V->getPointerDereferenceableBytes(DL, CheckForNonNull));
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if (KnownDerefBytes.getBoolValue() && KnownDerefBytes.uge(Size))
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if (!CheckForNonNull || isKnownNonZero(V, DL, 0, nullptr, CtxI, DT)) {
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// As we recursed through GEPs to get here, we've incrementally checked
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// that each step advanced by a multiple of the alignment. If our base is
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// properly aligned, then the original offset accessed must also be.
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Type *Ty = V->getType();
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assert(Ty->isSized() && "must be sized");
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APInt Offset(DL.getTypeStoreSizeInBits(Ty), 0);
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return isAligned(V, Offset, Alignment, DL);
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}
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// For GEPs, determine if the indexing lands within the allocated object.
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if (const GEPOperator *GEP = dyn_cast<GEPOperator>(V)) {
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const Value *Base = GEP->getPointerOperand();
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APInt Offset(DL.getIndexTypeSizeInBits(GEP->getType()), 0);
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if (!GEP->accumulateConstantOffset(DL, Offset) || Offset.isNegative() ||
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!Offset.urem(APInt(Offset.getBitWidth(), Alignment.value()))
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.isMinValue())
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return false;
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// If the base pointer is dereferenceable for Offset+Size bytes, then the
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// GEP (== Base + Offset) is dereferenceable for Size bytes. If the base
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// pointer is aligned to Align bytes, and the Offset is divisible by Align
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// then the GEP (== Base + Offset == k_0 * Align + k_1 * Align) is also
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// aligned to Align bytes.
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// Offset and Size may have different bit widths if we have visited an
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// addrspacecast, so we can't do arithmetic directly on the APInt values.
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return isDereferenceableAndAlignedPointer(
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Base, Alignment, Offset + Size.sextOrTrunc(Offset.getBitWidth()), DL,
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CtxI, DT, Visited);
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}
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// For gc.relocate, look through relocations
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if (const GCRelocateInst *RelocateInst = dyn_cast<GCRelocateInst>(V))
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return isDereferenceableAndAlignedPointer(
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RelocateInst->getDerivedPtr(), Alignment, Size, DL, CtxI, DT, Visited);
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if (const AddrSpaceCastInst *ASC = dyn_cast<AddrSpaceCastInst>(V))
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return isDereferenceableAndAlignedPointer(ASC->getOperand(0), Alignment,
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Size, DL, CtxI, DT, Visited);
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if (const auto *Call = dyn_cast<CallBase>(V))
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if (auto *RP = getArgumentAliasingToReturnedPointer(Call, true))
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return isDereferenceableAndAlignedPointer(RP, Alignment, Size, DL, CtxI,
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DT, Visited);
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// If we don't know, assume the worst.
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return false;
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}
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bool llvm::isDereferenceableAndAlignedPointer(const Value *V, Align Alignment,
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const APInt &Size,
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const DataLayout &DL,
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const Instruction *CtxI,
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const DominatorTree *DT) {
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// Note: At the moment, Size can be zero. This ends up being interpreted as
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// a query of whether [Base, V] is dereferenceable and V is aligned (since
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// that's what the implementation happened to do). It's unclear if this is
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// the desired semantic, but at least SelectionDAG does exercise this case.
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SmallPtrSet<const Value *, 32> Visited;
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return ::isDereferenceableAndAlignedPointer(V, Alignment, Size, DL, CtxI, DT,
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Visited);
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}
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bool llvm::isDereferenceableAndAlignedPointer(const Value *V, Type *Ty,
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MaybeAlign MA,
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const DataLayout &DL,
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const Instruction *CtxI,
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const DominatorTree *DT) {
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if (!Ty->isSized())
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return false;
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// When dereferenceability information is provided by a dereferenceable
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// attribute, we know exactly how many bytes are dereferenceable. If we can
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// determine the exact offset to the attributed variable, we can use that
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// information here.
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// Require ABI alignment for loads without alignment specification
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const Align Alignment = DL.getValueOrABITypeAlignment(MA, Ty);
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APInt AccessSize(DL.getIndexTypeSizeInBits(V->getType()),
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DL.getTypeStoreSize(Ty));
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return isDereferenceableAndAlignedPointer(V, Alignment, AccessSize, DL, CtxI,
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DT);
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}
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bool llvm::isDereferenceablePointer(const Value *V, Type *Ty,
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const DataLayout &DL,
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const Instruction *CtxI,
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const DominatorTree *DT) {
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return isDereferenceableAndAlignedPointer(V, Ty, Align::None(), DL, CtxI, DT);
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}
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/// Test if A and B will obviously have the same value.
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///
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/// This includes recognizing that %t0 and %t1 will have the same
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/// value in code like this:
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/// \code
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/// %t0 = getelementptr \@a, 0, 3
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/// store i32 0, i32* %t0
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/// %t1 = getelementptr \@a, 0, 3
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/// %t2 = load i32* %t1
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/// \endcode
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///
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static bool AreEquivalentAddressValues(const Value *A, const Value *B) {
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// Test if the values are trivially equivalent.
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if (A == B)
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return true;
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// Test if the values come from identical arithmetic instructions.
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// Use isIdenticalToWhenDefined instead of isIdenticalTo because
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// this function is only used when one address use dominates the
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// other, which means that they'll always either have the same
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// value or one of them will have an undefined value.
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if (isa<BinaryOperator>(A) || isa<CastInst>(A) || isa<PHINode>(A) ||
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isa<GetElementPtrInst>(A))
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if (const Instruction *BI = dyn_cast<Instruction>(B))
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if (cast<Instruction>(A)->isIdenticalToWhenDefined(BI))
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return true;
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// Otherwise they may not be equivalent.
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return false;
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}
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bool llvm::isDereferenceableAndAlignedInLoop(LoadInst *LI, Loop *L,
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ScalarEvolution &SE,
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DominatorTree &DT) {
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auto &DL = LI->getModule()->getDataLayout();
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Value *Ptr = LI->getPointerOperand();
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APInt EltSize(DL.getIndexTypeSizeInBits(Ptr->getType()),
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DL.getTypeStoreSize(LI->getType()));
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const Align Alignment = DL.getValueOrABITypeAlignment(
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MaybeAlign(LI->getAlignment()), LI->getType());
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Instruction *HeaderFirstNonPHI = L->getHeader()->getFirstNonPHI();
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// If given a uniform (i.e. non-varying) address, see if we can prove the
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// access is safe within the loop w/o needing predication.
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if (L->isLoopInvariant(Ptr))
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return isDereferenceableAndAlignedPointer(Ptr, Alignment, EltSize, DL,
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HeaderFirstNonPHI, &DT);
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// Otherwise, check to see if we have a repeating access pattern where we can
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// prove that all accesses are well aligned and dereferenceable.
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auto *AddRec = dyn_cast<SCEVAddRecExpr>(SE.getSCEV(Ptr));
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if (!AddRec || AddRec->getLoop() != L || !AddRec->isAffine())
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return false;
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auto* Step = dyn_cast<SCEVConstant>(AddRec->getStepRecurrence(SE));
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if (!Step)
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return false;
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// TODO: generalize to access patterns which have gaps
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if (Step->getAPInt() != EltSize)
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return false;
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// TODO: If the symbolic trip count has a small bound (max count), we might
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// be able to prove safety.
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auto TC = SE.getSmallConstantTripCount(L);
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if (!TC)
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return false;
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const APInt AccessSize = TC * EltSize;
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auto *StartS = dyn_cast<SCEVUnknown>(AddRec->getStart());
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if (!StartS)
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return false;
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assert(SE.isLoopInvariant(StartS, L) && "implied by addrec definition");
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Value *Base = StartS->getValue();
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// For the moment, restrict ourselves to the case where the access size is a
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// multiple of the requested alignment and the base is aligned.
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// TODO: generalize if a case found which warrants
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if (EltSize.urem(Alignment.value()) != 0)
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return false;
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return isDereferenceableAndAlignedPointer(Base, Alignment, AccessSize, DL,
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HeaderFirstNonPHI, &DT);
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}
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/// Check if executing a load of this pointer value cannot trap.
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///
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/// If DT and ScanFrom are specified this method performs context-sensitive
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/// analysis and returns true if it is safe to load immediately before ScanFrom.
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///
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/// If it is not obviously safe to load from the specified pointer, we do
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/// a quick local scan of the basic block containing \c ScanFrom, to determine
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/// if the address is already accessed.
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///
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/// This uses the pointee type to determine how many bytes need to be safe to
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/// load from the pointer.
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bool llvm::isSafeToLoadUnconditionally(Value *V, MaybeAlign MA, APInt &Size,
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const DataLayout &DL,
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Instruction *ScanFrom,
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const DominatorTree *DT) {
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// Zero alignment means that the load has the ABI alignment for the target
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const Align Alignment =
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DL.getValueOrABITypeAlignment(MA, V->getType()->getPointerElementType());
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// If DT is not specified we can't make context-sensitive query
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const Instruction* CtxI = DT ? ScanFrom : nullptr;
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if (isDereferenceableAndAlignedPointer(V, Alignment, Size, DL, CtxI, DT))
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return true;
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if (!ScanFrom)
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return false;
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if (Size.getBitWidth() > 64)
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return false;
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const uint64_t LoadSize = Size.getZExtValue();
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// Otherwise, be a little bit aggressive by scanning the local block where we
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// want to check to see if the pointer is already being loaded or stored
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// from/to. If so, the previous load or store would have already trapped,
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// so there is no harm doing an extra load (also, CSE will later eliminate
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// the load entirely).
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BasicBlock::iterator BBI = ScanFrom->getIterator(),
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E = ScanFrom->getParent()->begin();
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// We can at least always strip pointer casts even though we can't use the
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// base here.
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V = V->stripPointerCasts();
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while (BBI != E) {
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--BBI;
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// If we see a free or a call which may write to memory (i.e. which might do
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// a free) the pointer could be marked invalid.
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if (isa<CallInst>(BBI) && BBI->mayWriteToMemory() &&
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!isa<DbgInfoIntrinsic>(BBI))
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return false;
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Value *AccessedPtr;
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MaybeAlign MaybeAccessedAlign;
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if (LoadInst *LI = dyn_cast<LoadInst>(BBI)) {
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// Ignore volatile loads. The execution of a volatile load cannot
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// be used to prove an address is backed by regular memory; it can,
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// for example, point to an MMIO register.
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if (LI->isVolatile())
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continue;
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AccessedPtr = LI->getPointerOperand();
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MaybeAccessedAlign = MaybeAlign(LI->getAlignment());
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} else if (StoreInst *SI = dyn_cast<StoreInst>(BBI)) {
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// Ignore volatile stores (see comment for loads).
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if (SI->isVolatile())
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continue;
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AccessedPtr = SI->getPointerOperand();
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MaybeAccessedAlign = MaybeAlign(SI->getAlignment());
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} else
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continue;
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Type *AccessedTy = AccessedPtr->getType()->getPointerElementType();
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const Align AccessedAlign =
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DL.getValueOrABITypeAlignment(MaybeAccessedAlign, AccessedTy);
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if (AccessedAlign < Alignment)
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continue;
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// Handle trivial cases.
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if (AccessedPtr == V &&
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LoadSize <= DL.getTypeStoreSize(AccessedTy))
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return true;
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if (AreEquivalentAddressValues(AccessedPtr->stripPointerCasts(), V) &&
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LoadSize <= DL.getTypeStoreSize(AccessedTy))
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return true;
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}
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return false;
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}
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bool llvm::isSafeToLoadUnconditionally(Value *V, Type *Ty, MaybeAlign Alignment,
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const DataLayout &DL,
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Instruction *ScanFrom,
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const DominatorTree *DT) {
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APInt Size(DL.getIndexTypeSizeInBits(V->getType()), DL.getTypeStoreSize(Ty));
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return isSafeToLoadUnconditionally(V, Alignment, Size, DL, ScanFrom, DT);
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}
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/// DefMaxInstsToScan - the default number of maximum instructions
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/// to scan in the block, used by FindAvailableLoadedValue().
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/// FindAvailableLoadedValue() was introduced in r60148, to improve jump
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/// threading in part by eliminating partially redundant loads.
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/// At that point, the value of MaxInstsToScan was already set to '6'
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/// without documented explanation.
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cl::opt<unsigned>
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llvm::DefMaxInstsToScan("available-load-scan-limit", cl::init(6), cl::Hidden,
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cl::desc("Use this to specify the default maximum number of instructions "
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"to scan backward from a given instruction, when searching for "
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"available loaded value"));
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Value *llvm::FindAvailableLoadedValue(LoadInst *Load,
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BasicBlock *ScanBB,
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BasicBlock::iterator &ScanFrom,
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unsigned MaxInstsToScan,
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AliasAnalysis *AA, bool *IsLoad,
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unsigned *NumScanedInst) {
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// Don't CSE load that is volatile or anything stronger than unordered.
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if (!Load->isUnordered())
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return nullptr;
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return FindAvailablePtrLoadStore(
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Load->getPointerOperand(), Load->getType(), Load->isAtomic(), ScanBB,
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ScanFrom, MaxInstsToScan, AA, IsLoad, NumScanedInst);
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}
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Value *llvm::FindAvailablePtrLoadStore(Value *Ptr, Type *AccessTy,
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bool AtLeastAtomic, BasicBlock *ScanBB,
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BasicBlock::iterator &ScanFrom,
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unsigned MaxInstsToScan,
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AliasAnalysis *AA, bool *IsLoadCSE,
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unsigned *NumScanedInst) {
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if (MaxInstsToScan == 0)
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MaxInstsToScan = ~0U;
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const DataLayout &DL = ScanBB->getModule()->getDataLayout();
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Value *StrippedPtr = Ptr->stripPointerCasts();
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while (ScanFrom != ScanBB->begin()) {
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// We must ignore debug info directives when counting (otherwise they
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// would affect codegen).
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Instruction *Inst = &*--ScanFrom;
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if (isa<DbgInfoIntrinsic>(Inst))
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continue;
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// Restore ScanFrom to expected value in case next test succeeds
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ScanFrom++;
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if (NumScanedInst)
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++(*NumScanedInst);
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// Don't scan huge blocks.
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if (MaxInstsToScan-- == 0)
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return nullptr;
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--ScanFrom;
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// If this is a load of Ptr, the loaded value is available.
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// (This is true even if the load is volatile or atomic, although
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// those cases are unlikely.)
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if (LoadInst *LI = dyn_cast<LoadInst>(Inst))
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if (AreEquivalentAddressValues(
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LI->getPointerOperand()->stripPointerCasts(), StrippedPtr) &&
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CastInst::isBitOrNoopPointerCastable(LI->getType(), AccessTy, DL)) {
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// We can value forward from an atomic to a non-atomic, but not the
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// other way around.
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if (LI->isAtomic() < AtLeastAtomic)
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return nullptr;
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if (IsLoadCSE)
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*IsLoadCSE = true;
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return LI;
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}
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// Try to get the store size for the type.
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auto AccessSize = LocationSize::precise(DL.getTypeStoreSize(AccessTy));
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if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
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Value *StorePtr = SI->getPointerOperand()->stripPointerCasts();
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// If this is a store through Ptr, the value is available!
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// (This is true even if the store is volatile or atomic, although
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// those cases are unlikely.)
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if (AreEquivalentAddressValues(StorePtr, StrippedPtr) &&
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CastInst::isBitOrNoopPointerCastable(SI->getValueOperand()->getType(),
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AccessTy, DL)) {
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// We can value forward from an atomic to a non-atomic, but not the
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// other way around.
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if (SI->isAtomic() < AtLeastAtomic)
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return nullptr;
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if (IsLoadCSE)
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*IsLoadCSE = false;
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return SI->getOperand(0);
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}
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// If both StrippedPtr and StorePtr reach all the way to an alloca or
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// global and they are different, ignore the store. This is a trivial form
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// of alias analysis that is important for reg2mem'd code.
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if ((isa<AllocaInst>(StrippedPtr) || isa<GlobalVariable>(StrippedPtr)) &&
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(isa<AllocaInst>(StorePtr) || isa<GlobalVariable>(StorePtr)) &&
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StrippedPtr != StorePtr)
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continue;
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// If we have alias analysis and it says the store won't modify the loaded
|
|
// value, ignore the store.
|
|
if (AA && !isModSet(AA->getModRefInfo(SI, StrippedPtr, AccessSize)))
|
|
continue;
|
|
|
|
// Otherwise the store that may or may not alias the pointer, bail out.
|
|
++ScanFrom;
|
|
return nullptr;
|
|
}
|
|
|
|
// If this is some other instruction that may clobber Ptr, bail out.
|
|
if (Inst->mayWriteToMemory()) {
|
|
// If alias analysis claims that it really won't modify the load,
|
|
// ignore it.
|
|
if (AA && !isModSet(AA->getModRefInfo(Inst, StrippedPtr, AccessSize)))
|
|
continue;
|
|
|
|
// May modify the pointer, bail out.
|
|
++ScanFrom;
|
|
return nullptr;
|
|
}
|
|
}
|
|
|
|
// Got to the start of the block, we didn't find it, but are done for this
|
|
// block.
|
|
return nullptr;
|
|
}
|