Eric Christopher 00f399e90a One underscore, not two. ... llvm-svn: 105379		2010-06-03 04:02:59 +00:00
..
Alpha
ARM	Enable machine cse of instructions which define physical registers.	2010-06-02 01:08:27 +00:00
Blackfin
CBackend
CellSPU	Fix handling of 'load' nodes.	2010-06-01 13:34:47 +00:00
CPP
Generic	Implement expansion in type legalization for add/sub with overflow. The	2010-06-03 03:49:50 +00:00
MBlaze
Mips
MSP430	Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),	2010-05-01 12:52:34 +00:00
PIC16
PowerPC	Fix some latency computation bugs: if the use is not a machine opcode do not just return zero.	2010-05-28 23:26:21 +00:00
SPARC
SystemZ	SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and	2010-05-14 22:17:42 +00:00
Thumb	Enable a bunch more -regalloc=fast tests	2010-05-12 00:11:24 +00:00
Thumb2	Thumb2 RSBS instructions were being printed without the 'S' suffix.	2010-05-24 18:44:06 +00:00
X86	One underscore, not two.	2010-06-03 04:02:59 +00:00
XCore