1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll
Sam Parker df3e0498f9 [ARM] Run ARMParallelDSP in the IRPasses phase
Run EarlyCSE before ParallelDSP and do this in the backend IR opt
phase.

Differential Revision: https://reviews.llvm.org/D59257

llvm-svn: 356130
2019-03-14 10:57:40 +00:00

19 lines
529 B
LLVM

; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -arm-atomic-cfg-tidy=0 -O2 | FileCheck %s
; rdar://7493908
; Make sure the result of the first dynamic_alloc isn't copied back to sp more
; than once. We'll deal with poor codegen later.
define void @t() nounwind ssp {
entry:
; CHECK-LABEL: t:
%size = mul i32 8, 2
; CHECK: sub.w r0, sp, #16
; CHECK: mov sp, r0
%vla_a = alloca i8, i32 %size, align 8
; CHECK: sub.w r0, sp, #16
; CHECK: mov sp, r0
%vla_b = alloca i8, i32 %size, align 8
unreachable
}