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c168815f4b
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
31 lines
890 B
LLVM
31 lines
890 B
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=16
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@i = global i32 6, align 4
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@j = global i32 12, align 4
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@k = global i32 15, align 4
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@l = global i32 20, align 4
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@.str = private unnamed_addr constant [13 x i8] c"%i %i %i %i\0A\00", align 1
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define void @foo() nounwind {
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entry:
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%0 = load i32, i32* @i, align 4
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%add = add nsw i32 %0, 5
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store i32 %add, i32* @i, align 4
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%1 = load i32, i32* @j, align 4
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%sub = sub nsw i32 %1, 5
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store i32 %sub, i32* @j, align 4
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%2 = load i32, i32* @k, align 4
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%add1 = add nsw i32 %2, 10000
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store i32 %add1, i32* @k, align 4
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%3 = load i32, i32* @l, align 4
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%sub2 = sub nsw i32 %3, 10000
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store i32 %sub2, i32* @l, align 4
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; 16: addiu ${{[0-9]+}}, 5 # 16 bit inst
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; 16: addiu ${{[0-9]+}}, -5 # 16 bit inst
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; 16: addiu ${{[0-9]+}}, 10000
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; 16: addiu ${{[0-9]+}}, -10000
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ret void
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}
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