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c168815f4b
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
32 lines
898 B
LLVM
32 lines
898 B
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=16
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@i = global i32 25, align 4
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@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1
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define void @p(i32* %i) nounwind {
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entry:
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ret void
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}
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define void @foo() nounwind {
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entry:
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%y = alloca [512 x i32], align 4
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%x = alloca i32, align 8
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%zz = alloca i32, align 4
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%z = alloca i32, align 4
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%0 = load i32, i32* @i, align 4
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%arrayidx = getelementptr inbounds [512 x i32], [512 x i32]* %y, i32 0, i32 10
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store i32 %0, i32* %arrayidx, align 4
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%1 = load i32, i32* @i, align 4
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store i32 %1, i32* %x, align 8
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call void @p(i32* %x)
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%arrayidx1 = getelementptr inbounds [512 x i32], [512 x i32]* %y, i32 0, i32 10
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call void @p(i32* %arrayidx1)
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ret void
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}
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; 16: save $ra, 2040
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; 16: addiu $sp, -40 # 16 bit inst
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; 16: addiu $sp, 40 # 16 bit inst
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; 16: restore $ra, 2040
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