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7f1aac1021
Mangling type information into MachineInstr opcode names was a temporary measure, and it's starting to get hairy. At the same time, the MC instruction printer wants to use AsmString strings for printing. This patch takes the first step, starting the process of adding AsmStrings for instructions. llvm-svn: 252203
68 lines
2.8 KiB
TableGen
68 lines
2.8 KiB
TableGen
// WebAssemblyInstrFloat.td-WebAssembly Float codegen support ---*- tablegen -*-
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief WebAssembly Floating-point operand code-gen constructs.
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///
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//===----------------------------------------------------------------------===//
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defm ADD : BinaryFP<fadd, "add">;
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defm SUB : BinaryFP<fsub, "sub">;
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defm MUL : BinaryFP<fmul, "mul">;
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defm DIV : BinaryFP<fdiv, "div">;
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defm SQRT : UnaryFP<fsqrt, "sqrt">;
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defm ABS : UnaryFP<fabs, "abs">;
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defm NEG : UnaryFP<fneg, "neg">;
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defm COPYSIGN : BinaryFP<fcopysign, "copysign">;
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defm CEIL : UnaryFP<fceil, "ceil">;
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defm FLOOR : UnaryFP<ffloor, "floor">;
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defm TRUNC : UnaryFP<ftrunc, "trunc">;
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defm NEAREST : UnaryFP<fnearbyint, "nearest">;
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// WebAssembly doesn't expose inexact exceptions, so map frint to fnearbyint.
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def : Pat<(frint f32:$src), (NEAREST_F32 f32:$src)>;
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def : Pat<(frint f64:$src), (NEAREST_F64 f64:$src)>;
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defm EQ : ComparisonFP<SETOEQ, "eq">;
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defm NE : ComparisonFP<SETUNE, "ne">;
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defm LT : ComparisonFP<SETOLT, "lt">;
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defm LE : ComparisonFP<SETOLE, "le">;
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defm GT : ComparisonFP<SETOGT, "gt">;
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defm GE : ComparisonFP<SETOGE, "ge">;
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// Don't care floating-point comparisons, supported via other comparisons.
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def : Pat<(seteq f32:$lhs, f32:$rhs), (EQ_F32 f32:$lhs, f32:$rhs)>;
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def : Pat<(setne f32:$lhs, f32:$rhs), (NE_F32 f32:$lhs, f32:$rhs)>;
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def : Pat<(setlt f32:$lhs, f32:$rhs), (LT_F32 f32:$lhs, f32:$rhs)>;
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def : Pat<(setle f32:$lhs, f32:$rhs), (LE_F32 f32:$lhs, f32:$rhs)>;
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def : Pat<(setgt f32:$lhs, f32:$rhs), (GT_F32 f32:$lhs, f32:$rhs)>;
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def : Pat<(setge f32:$lhs, f32:$rhs), (GE_F32 f32:$lhs, f32:$rhs)>;
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def : Pat<(seteq f64:$lhs, f64:$rhs), (EQ_F64 f64:$lhs, f64:$rhs)>;
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def : Pat<(setne f64:$lhs, f64:$rhs), (NE_F64 f64:$lhs, f64:$rhs)>;
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def : Pat<(setlt f64:$lhs, f64:$rhs), (LT_F64 f64:$lhs, f64:$rhs)>;
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def : Pat<(setle f64:$lhs, f64:$rhs), (LE_F64 f64:$lhs, f64:$rhs)>;
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def : Pat<(setgt f64:$lhs, f64:$rhs), (GT_F64 f64:$lhs, f64:$rhs)>;
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def : Pat<(setge f64:$lhs, f64:$rhs), (GE_F64 f64:$lhs, f64:$rhs)>;
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/*
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* TODO(jfb): Add the following for 32-bit and 64-bit.
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*
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* f32.min: minimum (binary operator); if either operand is NaN, returns NaN
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* f32.max: maximum (binary operator); if either operand is NaN, returns NaN
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*/
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def SELECT_F32 : I<(outs F32:$dst), (ins I32:$cond, F32:$lhs, F32:$rhs),
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[(set F32:$dst, (select I32:$cond, F32:$lhs, F32:$rhs))],
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"f32.select $dst, $cond, $lhs, $rhs">;
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def SELECT_F64 : I<(outs F64:$dst), (ins I32:$cond, F64:$lhs, F64:$rhs),
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[(set F64:$dst, (select I32:$cond, F64:$lhs, F64:$rhs))],
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"f64.select $dst, $cond, $lhs, $rhs">;
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