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667cd15c1c
Some of the special intrinsics now that now correspond to a instruction also have special setting of some registers, e.g. llvm.SI.sendmsg sets m0 as well as use s_sendmsg. Using these explicit register intrinsics may be a better option. Reading the exec mask and others may be useful for debugging. For this I'm not sure this is entirely correct because we would want this to be convergent, although it's possible this is already treated sufficently conservatively. llvm-svn: 258785
15 lines
465 B
LLVM
15 lines
465 B
LLVM
; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck %s
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; CHECK: invalid register "flat_scratch_lo" for subtarget.
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declare i32 @llvm.read_register.i32(metadata) #0
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define void @test_invalid_read_flat_scratch_lo(i32 addrspace(1)* %out) nounwind {
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store volatile i32 0, i32 addrspace(3)* undef
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%m0 = call i32 @llvm.read_register.i32(metadata !0)
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store i32 %m0, i32 addrspace(1)* %out
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ret void
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}
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!0 = !{!"flat_scratch_lo"}
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