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651963bf5d
The test used to rely on targeting win64 to disable fast isel, but I'd like to teach fast isel about win64 rets. Change the test to use varargs to disable fast isel. llvm-svn: 275568
73 lines
2.6 KiB
LLVM
73 lines
2.6 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-pc-win32 -O0 -mattr=+avx | FileCheck %s
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; Background:
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; If fast-isel bails out to normal selection, then the DAG combiner will run,
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; even at -O0. In principle this should not happen (those are optimizations,
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; and we said -O0) but as a practical matter there are some instruction
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; selection patterns that depend on the legalizations and transforms that the
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; DAG combiner does.
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;
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; The 'optnone' attribute implicitly sets -O0 and fast-isel for the function.
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; The DAG combiner was disabled for 'optnone' (but not -O0) by r221168, then
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; re-enabled in r233153 because of problems with instruction selection patterns
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; mentioned above. (Note: because 'optnone' is supposed to match -O0, r221168
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; really should have disabled the combiner for both.)
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;
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; If instruction selection eventually becomes smart enough to run without DAG
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; combiner, then the combiner can be turned off for -O0 (not just 'optnone')
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; and this test can go away. (To be replaced by a different test that verifies
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; the DAG combiner does *not* run at -O0 or for 'optnone' functions.)
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;
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; In the meantime, this test wants to make sure the combiner stays enabled for
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; 'optnone' functions, just as it is for -O0.
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; The test cases @foo[WithOptnone] prove that the same DAG combine happens
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; with -O0 and with 'optnone' set. To prove this, we use a varags to cause
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; fast-isel to bail out (varags aren't handled in fast isel). Then we have
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; a repeated fadd that can be combined into an fmul. We show that this
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; happens in both the non-optnone function and the optnone function.
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define float @foo(float %x, ...) #0 {
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entry:
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%add = fadd fast float %x, %x
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%add1 = fadd fast float %add, %x
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ret float %add1
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}
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; CHECK-LABEL: @foo
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; CHECK-NOT: add
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; CHECK: mul
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; CHECK-NEXT: ret
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define float @fooWithOptnone(float %x, ...) #1 {
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entry:
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%add = fadd fast float %x, %x
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%add1 = fadd fast float %add, %x
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ret float %add1
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}
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; CHECK-LABEL: @fooWithOptnone
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; CHECK-NOT: add
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; CHECK: mul
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; CHECK-NEXT: ret
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; The test case @bar is derived from an instruction selection failure case
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; that was solved by r233153. It depends on -mattr=+avx.
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; Really all we're trying to prove is that it doesn't crash any more.
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@id84 = common global <16 x i32> zeroinitializer, align 64
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define void @bar(...) #1 {
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entry:
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%id83 = alloca <16 x i8>, align 16
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%0 = load <16 x i32>, <16 x i32>* @id84, align 64
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%conv = trunc <16 x i32> %0 to <16 x i8>
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store <16 x i8> %conv, <16 x i8>* %id83, align 16
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ret void
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}
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attributes #0 = { "unsafe-fp-math"="true" }
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attributes #1 = { noinline optnone "unsafe-fp-math"="true" }
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