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78eb7f43a4
Commit in the name of:Coby Tayree
1.'v' constraint for (x86) non-avx arch imitates the already implemented 'x' constraint, i.e. allows XMM{0-15} & YMM{0-15} depending on the apparent arch & mode (32/64).
2.for the avx512 arch it allows [X,Y,Z]MM{0-31} (mode dependent)
This patch applies the needed changes to clang
clang patch: https://reviews.llvm.org/D25004
Differential Revision: D25005
llvm-svn: 283717
137 lines
4.6 KiB
LLVM
137 lines
4.6 KiB
LLVM
; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx | FileCheck %s
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; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
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define <4 x float> @testXMM_1(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vmovhlps %xmm1, %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "vmovhlps $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l, <4 x float> %_xmm0)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_2(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: movapd %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "movapd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_3(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vmovapd %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "vmovapd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_4(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vmpsadbw $0, %xmm1, %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "vmpsadbw $$0, $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l, <4 x float> %_xmm0)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_5(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vminpd %xmm0, %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "vminpd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l, i64 %_l)
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ret <4 x float> %0
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}
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define i64 @testXMM_6(i64 returned %_l) {
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; CHECK: vmovd %xmm0, %eax
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entry:
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tail call void asm sideeffect "vmovd $0, %eax", "v,~{dirflag},~{fpsr},~{flags}"(i64 %_l)
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ret i64 %_l
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}
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define <4 x float> @testXMM_7(<4 x float> returned %_xmm0) {
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; CHECK: vmovmskps %xmm0, %eax
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entry:
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tail call void asm sideeffect "vmovmskps $0, %rax", "v,~{dirflag},~{fpsr},~{flags}"(<4 x float> %_xmm0)
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ret <4 x float> %_xmm0
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}
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define i64 @testXMM_8(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vmulsd %xmm1, %xmm0, %xmm0
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entry:
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%0 = tail call i64 asm "vmulsd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l, <4 x float> %_xmm0)
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ret i64 %0
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}
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define <4 x float> @testXMM_9(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vorpd %xmm1, %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "vorpd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l, <4 x float> %_xmm0)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_10(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: pabsb %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "pabsb $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_11(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vpabsd %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "vpabsd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l)
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ret <4 x float> %0
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}
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define <8 x float> @testYMM_1(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: vmovsldup %ymm0, %ymm0
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entry:
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%0 = tail call <8 x float> asm "vmovsldup $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm0)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_2(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: vmovapd %ymm1, %ymm0
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entry:
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%0 = tail call <8 x float> asm "vmovapd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_3(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: vminpd %ymm1, %ymm0, %ymm0
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entry:
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%0 = tail call <8 x float> asm "vminpd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_4(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: vorpd %ymm1, %ymm0, %ymm0
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entry:
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%0 = tail call <8 x float> asm "vorpd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: vmulps %ymm1, %ymm0, %ymm0
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entry:
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%0 = tail call <8 x float> asm "vmulps $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_6(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: vmulpd %ymm1, %ymm0, %ymm0
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entry:
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%0 = tail call <8 x float> asm "vmulpd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_7(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: vmovups %ymm1, %ymm0
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entry:
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%0 = tail call <8 x float> asm "vmovups $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_8(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: vmovupd %ymm1, %ymm0
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entry:
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%0 = tail call <8 x float> asm "vmovupd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
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ret <8 x float> %0
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}
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