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llvm-mirror/test/CodeGen/X86/vec_zero.ll
David Blaikie ab043ff680 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794
2015-02-27 21:17:42 +00:00

31 lines
930 B
LLVM

; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
; CHECK: foo
; CHECK: xorps
define void @foo(<4 x float>* %P) {
%T = load <4 x float>, <4 x float>* %P ; <<4 x float>> [#uses=1]
%S = fadd <4 x float> zeroinitializer, %T ; <<4 x float>> [#uses=1]
store <4 x float> %S, <4 x float>* %P
ret void
}
; CHECK: bar
; CHECK: pxor
define void @bar(<4 x i32>* %P) {
%T = load <4 x i32>, <4 x i32>* %P ; <<4 x i32>> [#uses=1]
%S = sub <4 x i32> zeroinitializer, %T ; <<4 x i32>> [#uses=1]
store <4 x i32> %S, <4 x i32>* %P
ret void
}
; Without any type hints from operations, we fall back to the smaller xorps.
; The IR type <4 x i32> is ignored.
; CHECK: untyped_zero
; CHECK: xorps
; CHECK: movaps
define void @untyped_zero(<4 x i32>* %p) {
entry:
store <4 x i32> zeroinitializer, <4 x i32>* %p, align 16
ret void
}