Artem Belevich 0226799a56 [NVPTX, CUDA] Add .and.popc variant of the b1 MMA instruction. ... That should allow clang to compile mma.h from CUDA-11.3. Differential Revision: https://reviews.llvm.org/D105384		2021-07-15 12:02:09 -07:00
..
MCTargetDesc
TargetInfo
cl_common_defines.h
CMakeLists.txt
ManagedStringPool.h
NVPTX.h
NVPTX.td
NVPTXAllocaHoisting.cpp
NVPTXAllocaHoisting.h
NVPTXAsmPrinter.cpp
NVPTXAsmPrinter.h
NVPTXAssignValidGlobalNames.cpp
NVPTXAtomicLower.cpp
NVPTXAtomicLower.h
NVPTXFrameLowering.cpp
NVPTXFrameLowering.h
NVPTXGenericToNVVM.cpp
NVPTXImageOptimizer.cpp
NVPTXInstrFormats.td
NVPTXInstrInfo.cpp
NVPTXInstrInfo.h
NVPTXInstrInfo.td	[NVPTX, CUDA] Add .and.popc variant of the b1 MMA instruction.	2021-07-15 12:02:09 -07:00
NVPTXIntrinsics.td	[NVPTX, CUDA] Add .and.popc variant of the b1 MMA instruction.	2021-07-15 12:02:09 -07:00
NVPTXISelDAGToDAG.cpp	Rename MachineMemOperand::getOrdering -> getSuccessOrdering.	2021-06-21 16:49:27 -07:00
NVPTXISelDAGToDAG.h
NVPTXISelLowering.cpp	[Clang][NVPTX] Add NVPTX intrinsics and builtins for CUDA PTX 6.5 and 7.0 WMMA and MMA instructions	2021-06-29 15:44:07 -07:00
NVPTXISelLowering.h
NVPTXLowerAggrCopies.cpp
NVPTXLowerAggrCopies.h
NVPTXLowerAlloca.cpp	[OpaquePtr] Use AllocaInst::getAllocatedType()	2021-07-13 09:34:33 -07:00
NVPTXLowerArgs.cpp	[NVPTX] Pass explicit GEP type (NFC)	2021-07-08 21:21:43 +02:00
NVPTXMachineFunctionInfo.h
NVPTXMCExpr.cpp
NVPTXMCExpr.h
NVPTXPeephole.cpp
NVPTXPrologEpilogPass.cpp
NVPTXProxyRegErasure.cpp
NVPTXRegisterInfo.cpp
NVPTXRegisterInfo.h
NVPTXRegisterInfo.td
NVPTXReplaceImageHandles.cpp
NVPTXSubtarget.cpp
NVPTXSubtarget.h
NVPTXTargetMachine.cpp
NVPTXTargetMachine.h
NVPTXTargetObjectFile.h
NVPTXTargetTransformInfo.cpp
NVPTXTargetTransformInfo.h
NVPTXUtilities.cpp
NVPTXUtilities.h
NVVMIntrRange.cpp
NVVMReflect.cpp