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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
llvm-mirror/test/CodeGen
Diana Picus 97796d8b55 [ARM][GlobalISel] Support for G_ANYEXT
G_ANYEXT can be introduced by the legalizer when widening scalars. Add
support for it in the register bank info (same mapping as everything
else) and in the instruction selector.

When selecting it, we treat it as a COPY, just like G_TRUNC. On this
occasion we get rid of some assertions in selectCopy so we can reuse it.
This shouldn't be a problem at the moment since we're not supporting any
complicated cases (e.g. FPR, different register banks). We might want to
separate the paths when we do.

llvm-svn: 302778
2017-05-11 08:28:31 +00:00
..
AArch64 [AArch64][RegisterBankInfo] Change the default mapping of fp stores. 2017-05-10 15:19:41 +00:00
AMDGPU [AMDGPU][MC] Corrected v_madak/madmk to avoid printing "_e32" in disassembler output 2017-05-10 13:00:28 +00:00
ARM [ARM][GlobalISel] Support for G_ANYEXT 2017-05-11 08:28:31 +00:00
AVR
BPF [bpf] fix a bug which causes incorrect big endian reloc fixup 2017-05-05 18:05:00 +00:00
Generic Add a late IR expansion pass for the experimental reduction intrinsics. 2017-05-10 09:42:49 +00:00
Hexagon Add extra operand to CALLSEQ_START to keep frame part set up previously 2017-05-09 13:35:13 +00:00
Inputs
Lanai [lanai] Add computeKnownBitsForTargetNode for Lanai. 2017-05-09 18:35:26 +00:00
Mips Revert "[MIPS] Add support to match more patterns for DINS instruction" 2017-05-09 13:18:48 +00:00
MIR [IfConversion] Add missing check in IfConversion/canFallThroughTo 2017-05-10 13:06:13 +00:00
MSP430
NVPTX
PowerPC Add extra operand to CALLSEQ_START to keep frame part set up previously 2017-05-09 13:35:13 +00:00
SPARC
SystemZ [SystemZ] Implement getRepRegClassFor() 2017-05-10 13:03:25 +00:00
Thumb
Thumb2
WebAssembly
WinEH
X86 [GlobalISel][X86] G_ICMP support. 2017-05-11 07:17:40 +00:00
XCore