Francis Visoiu Mistrih 0281a4fd10 [CodeGen] Print RegClasses on MI in verbose mode ... r322086 removed the trailing information describing reg classes for each register. This patch adds printing reg classes next to every register when individual operands/instructions/basic blocks are printed. In the case of dumping MIR or printing a full function, by default don't print it. Differential Revision: https://reviews.llvm.org/D42239 llvm-svn: 322867		2018-01-18 17:59:06 +00:00
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GlobalISel	Fix a bunch more layering of CodeGen headers that are in Target	2017-11-17 01:07:10 +00:00
CMakeLists.txt	MachineInstr: Make isEqual agree with getHashValue in MachineInstrExpressionTrait	2017-10-12 13:59:51 +00:00
DIEHashTest.cpp	Move Object format code to lib/BinaryFormat.	2017-06-07 03:48:56 +00:00
LowLevelTypeTest.cpp	[GlobalISel] Enable legalizing non-power-of-2 sized types.	2017-11-07 10:34:34 +00:00
MachineInstrBundleIteratorTest.cpp	Re-sort #include lines for unittests. This uses a slightly modified	2017-06-06 11:06:56 +00:00
MachineInstrTest.cpp	Remove the unit test from r321783.	2018-01-04 05:04:41 +00:00
MachineOperandTest.cpp	[CodeGen] Print RegClasses on MI in verbose mode	2018-01-18 17:59:06 +00:00
ScalableVectorMVTsTest.cpp	[SVE] Fix mismatched sign comparison warning in unit test from r300842.	2017-04-20 16:54:49 +00:00