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e29dba6476
Currently, when edge weights are assigned to edges that are created when lowering switch statement, the weight on the edge to default statement (let's call it "default weight" here) is not considered. We need to distribute this weight properly. However, without value profiling, we have no idea how to distribute it. In this patch, I applied the heuristic that this weight is evenly distributed to successors. For example, given a switch statement with cases 1,2,3,5,10,11,20, and every edge from switch to each successor has weight 10. If there is a binary search tree built to test if n < 10, then its two out-edges will have weight 4x10+10/2 = 45 and 3x10 + 10/2 = 35 respectively (currently they are 40 and 30 without considering the default weight). Each distribution (which is 5 here) will be stored in each SwitchWorkListItem for further distribution. There are some exceptions: For a jump table header which doesn't have any edge to default statement, we don't distribute the default weight to it. For a bit test header which covers a contiguous range and hence has no edges to default statement, we don't distribute the default weight to it. When the branch checks a single value or a contiguous range with no edge to default statement, we don't distribute the default weight to it. In other cases, the default weight is evenly distributed to successors. Differential Revision: http://reviews.llvm.org/D12418 llvm-svn: 246522
75 lines
2.1 KiB
LLVM
75 lines
2.1 KiB
LLVM
; RUN: llc < %s -print-machineinstrs=expand-isel-pseudos -o /dev/null 2>&1 | FileCheck %s
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; ARM & AArch64 run an extra SimplifyCFG which disrupts this test.
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; Hexagon crashes (PR23377)
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; XFAIL: arm,aarch64,hexagon
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; Make sure we have the correct weight attached to each successor.
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define i32 @test2(i32 %x) nounwind uwtable readnone ssp {
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; CHECK-LABEL: Machine code for function test2:
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entry:
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%conv = sext i32 %x to i64
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switch i64 %conv, label %return [
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i64 0, label %sw.bb
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i64 1, label %sw.bb
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i64 4, label %sw.bb
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i64 5, label %sw.bb1
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], !prof !0
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; CHECK: BB#0: derived from LLVM BB %entry
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; CHECK: Successors according to CFG: BB#2(64) BB#4(21)
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; CHECK: BB#4: derived from LLVM BB %entry
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; CHECK: Successors according to CFG: BB#1(10) BB#5(11)
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; CHECK: BB#5: derived from LLVM BB %entry
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; CHECK: Successors according to CFG: BB#1(4) BB#3(7)
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sw.bb:
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br label %return
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sw.bb1:
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br label %return
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return:
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%retval.0 = phi i32 [ 5, %sw.bb1 ], [ 1, %sw.bb ], [ 0, %entry ]
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ret i32 %retval.0
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}
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!0 = !{!"branch_weights", i32 7, i32 6, i32 4, i32 4, i32 64}
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declare void @g(i32)
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define void @left_leaning_weight_balanced_tree(i32 %x) {
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entry:
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switch i32 %x, label %return [
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i32 0, label %bb0
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i32 10, label %bb1
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i32 20, label %bb2
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i32 30, label %bb3
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i32 40, label %bb4
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i32 50, label %bb5
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], !prof !1
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bb0: tail call void @g(i32 0) br label %return
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bb1: tail call void @g(i32 1) br label %return
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bb2: tail call void @g(i32 2) br label %return
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bb3: tail call void @g(i32 3) br label %return
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bb4: tail call void @g(i32 4) br label %return
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bb5: tail call void @g(i32 5) br label %return
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return: ret void
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; Check that we set branch weights on the pivot cmp instruction correctly.
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; Cases {0,10,20,30} go on the left with weight 13; cases {40,50} go on the
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; right with weight 20.
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;
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; CHECK-LABEL: Machine code for function left_leaning_weight_balanced_tree:
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; CHECK: BB#0: derived from LLVM BB %entry
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; CHECK-NOT: Successors
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; CHECK: Successors according to CFG: BB#8(13) BB#9(20)
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}
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!1 = !{!"branch_weights",
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; Default:
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i32 1,
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; Case 0, 10, 20:
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i32 10, i32 1, i32 1,
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; Case 30, 40, 50:
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i32 1, i32 10, i32 10}
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