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d3fc2eb946
Currently there are a few pointer comparisons in ValueDFS_Compare, which
can cause non-deterministic ordering when materializing values. There
are 2 cases this patch fixes:
1. Order defs before uses used to compare pointers, which guarantees
defs before uses, but causes non-deterministic ordering between 2
uses or 2 defs, depending on the allocation order. By converting the
pointers to booleans, we can circumvent that problem.
2. comparePHIRelated was comparing the basic block pointers of edges,
which also results in a non-deterministic order and is also not
really meaningful for ordering. By ordering by their destination DFS
numbers we guarantee a deterministic order.
For the example below, we can end up with 2 different uselist orderings,
when running `opt -mem2reg -ipsccp` hundreds of times. Because the
non-determinism is caused by allocation ordering, we cannot reproduce it
with ipsccp alone.
declare i32 @hoge() local_unnamed_addr #0
define dso_local i32 @ham(i8* %arg, i8* %arg1) #0 {
bb:
%tmp = alloca i32
%tmp2 = alloca i32, align 4
br label %bb19
bb4: ; preds = %bb20
br label %bb6
bb6: ; preds = %bb4
%tmp7 = call i32 @hoge()
store i32 %tmp7, i32* %tmp
%tmp8 = load i32, i32* %tmp
%tmp9 = icmp eq i32 %tmp8, 912730082
%tmp10 = load i32, i32* %tmp
br i1 %tmp9, label %bb11, label %bb16
bb11: ; preds = %bb6
unreachable
bb13: ; preds = %bb20
br label %bb14
bb14: ; preds = %bb13
%tmp15 = load i32, i32* %tmp
br label %bb16
bb16: ; preds = %bb14, %bb6
%tmp17 = phi i32 [ %tmp10, %bb6 ], [ 0, %bb14 ]
br label %bb19
bb18: ; preds = %bb20
unreachable
bb19: ; preds = %bb16, %bb
br label %bb20
bb20: ; preds = %bb19
indirectbr i8* null, [label %bb4, label %bb13, label %bb18]
}
Reviewers: davide, efriedma
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D64866
llvm-svn: 367049
77 lines
2.4 KiB
LLVM
77 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -ipsccp -S %s | FileCheck %s
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declare i32 @hoge()
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define dso_local i32 @ham(i8* %arg, i8* %arg1) {
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; CHECK-LABEL: @ham(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[TMP:%.*]] = alloca i32
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; CHECK-NEXT: [[TMP2:%.*]] = alloca i32, align 4
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; CHECK-NEXT: br label [[BB19:%.*]]
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; CHECK: bb4:
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; CHECK-NEXT: br label [[BB6:%.*]]
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; CHECK: bb6:
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; CHECK-NEXT: [[TMP7:%.*]] = call i32 @hoge()
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; CHECK-NEXT: store i32 [[TMP7]], i32* [[TMP]]
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; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP]]
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; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 912730082
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; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP]]
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; CHECK-NEXT: br i1 [[TMP9]], label [[BB11:%.*]], label [[BB16:%.*]]
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; CHECK: bb11:
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; CHECK-NEXT: unreachable
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; CHECK: bb13:
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; CHECK-NEXT: br label [[BB14:%.*]]
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; CHECK: bb14:
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; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP]]
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; CHECK-NEXT: br label [[BB16]]
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; CHECK: bb16:
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; CHECK-NEXT: [[TMP17:%.*]] = phi i32 [ [[TMP10]], [[BB6]] ], [ 0, [[BB14]] ]
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; CHECK-NEXT: br label [[BB19]]
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; CHECK: bb18:
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; CHECK-NEXT: unreachable
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; CHECK: bb19:
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; CHECK-NEXT: br label [[BB20:%.*]]
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; CHECK: bb20:
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; CHECK-NEXT: indirectbr i8* null, [label [[BB4:%.*]], label [[BB13:%.*]], label %bb18]
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;
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bb:
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%tmp = alloca i32
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%tmp2 = alloca i32, align 4
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br label %bb19
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bb4: ; preds = %bb20
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br label %bb6
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bb6: ; preds = %bb4
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%tmp7 = call i32 @hoge()
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store i32 %tmp7, i32* %tmp
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%tmp8 = load i32, i32* %tmp
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%tmp9 = icmp eq i32 %tmp8, 912730082
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%tmp10 = load i32, i32* %tmp
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br i1 %tmp9, label %bb11, label %bb16
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bb11: ; preds = %bb6
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unreachable
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bb13: ; preds = %bb20
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br label %bb14
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bb14: ; preds = %bb13
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%tmp15 = load i32, i32* %tmp
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br label %bb16
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bb16: ; preds = %bb14, %bb6
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%tmp17 = phi i32 [ %tmp10, %bb6 ], [ 0, %bb14 ]
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br label %bb19
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bb18: ; preds = %bb20
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unreachable
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bb19: ; preds = %bb16, %bb
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br label %bb20
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bb20: ; preds = %bb19
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indirectbr i8* null, [label %bb4, label %bb13, label %bb18]
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}
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