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llvm-mirror/test/MC/Mips/mips32
Daniel Sanders 03454ab1ca [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6
Summary:
Also tightened up the acceptable condition operand for these instructions
on MIPS-I to MIPS-III. Support for $fcc[1-7] was added in MIPS-IV. Prior
to that only $fcc0 is acceptable.

We currently don't optimize (BEQZ (NOT $a), $target) and similar. It's
probably best to do this in InstCombine.

Depends on D4111

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4112

llvm-svn: 210787
2014-06-12 15:00:17 +00:00
..
invalid-mips32r2-xfail.s [mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them 2014-05-13 11:45:36 +00:00
invalid-mips32r2.s [mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them 2014-05-13 11:45:36 +00:00
invalid-mips64.s [mips] Fold FeatureBitCount into FeatureMips32 and FeatureMips64 2014-05-12 12:41:59 +00:00
valid-xfail.s [mips] Correct tests that are meant to test valid assembly. They were actually rejected by GAS. 2014-05-08 15:17:29 +00:00
valid.s [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6 2014-06-12 15:00:17 +00:00