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c40eb525ad
bug fixes, and with improved heuristics for analyzing foreign-loop addrecs. This change also flattens IVUsers, eliminating the stride-oriented groupings, which makes it easier to work with. llvm-svn: 95975
46 lines
1.6 KiB
LLVM
46 lines
1.6 KiB
LLVM
; RUN: llc < %s -march=x86 -relocation-model=pic | FileCheck %s -check-prefix=PIC
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; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s -check-prefix=STATIC
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;
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; Make sure the common loop invariant A is hoisted up to preheader,
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; since too many registers are needed to subsume it into the addressing modes.
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; It's safe to sink A in when it's not pic.
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; PIC: align
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; PIC: movl $4, -4([[REG:%e[a-z]+]])
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; PIC: movl $5, ([[REG]])
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; PIC: addl $4, [[REG]]
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; PIC: decl {{%e[[a-z]+}}
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; PIC: jne
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; STATIC: align
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; STATIC: movl $4, -4(%ecx)
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; STATIC: movl $5, (%ecx)
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; STATIC: addl $4, %ecx
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; STATIC: decl %eax
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; STATIC: jne
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@A = global [16 x [16 x i32]] zeroinitializer, align 32 ; <[16 x [16 x i32]]*> [#uses=2]
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define void @test(i32 %row, i32 %N.in) nounwind {
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entry:
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%N = bitcast i32 %N.in to i32 ; <i32> [#uses=1]
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%tmp5 = icmp sgt i32 %N.in, 0 ; <i1> [#uses=1]
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br i1 %tmp5, label %cond_true, label %return
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cond_true: ; preds = %cond_true, %entry
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%indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
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%i.0.0 = bitcast i32 %indvar to i32 ; <i32> [#uses=2]
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%tmp2 = add i32 %i.0.0, 1 ; <i32> [#uses=1]
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%tmp = getelementptr [16 x [16 x i32]]* @A, i32 0, i32 %row, i32 %tmp2 ; <i32*> [#uses=1]
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store i32 4, i32* %tmp
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%tmp5.upgrd.1 = add i32 %i.0.0, 2 ; <i32> [#uses=1]
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%tmp7 = getelementptr [16 x [16 x i32]]* @A, i32 0, i32 %row, i32 %tmp5.upgrd.1 ; <i32*> [#uses=1]
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store i32 5, i32* %tmp7
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
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%exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %cond_true
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return: ; preds = %cond_true, %entry
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ret void
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}
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