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4a28de9033
expandPostRAPseudo(): STX -> 2 * STD: The first STD should not have the kill flag set for the address. SystemZElimCompare: BRC -> BRCT conversion: Don't forget to remove the CC<use,kill> operand. Needed to make SystemZ/asm-17.ll pass with -verify-machineinstrs, which now runs with this flag. Reviewed by Ulrich Weigand. llvm-svn: 249945
107 lines
2.2 KiB
LLVM
107 lines
2.2 KiB
LLVM
; Test explicit register names.
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;
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; RUN: llc < %s -verify-machineinstrs -mtriple=s390x-linux-gnu -no-integrated-as \
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; RUN: | FileCheck %s
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; Test i32 GPRs.
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define i32 @f1() {
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; CHECK-LABEL: f1:
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; CHECK: lhi %r4, 1
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; CHECK: blah %r4
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; CHECK: lr %r2, %r4
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; CHECK: br %r14
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%ret = call i32 asm "blah $0", "={r4},0" (i32 1)
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ret i32 %ret
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}
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; Test i64 GPRs.
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define i64 @f2() {
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; CHECK-LABEL: f2:
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; CHECK: lghi %r4, 1
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; CHECK: blah %r4
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; CHECK: lgr %r2, %r4
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; CHECK: br %r14
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%ret = call i64 asm "blah $0", "={r4},0" (i64 1)
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ret i64 %ret
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}
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; Test i32 FPRs.
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define float @f3() {
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; CHECK-LABEL: f3:
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; CHECK: lzer %f4
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; CHECK: blah %f4
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; CHECK: ler %f0, %f4
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; CHECK: br %r14
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%ret = call float asm "blah $0", "={f4},0" (float 0.0)
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ret float %ret
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}
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; Test i64 FPRs.
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define double @f4() {
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; CHECK-LABEL: f4:
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; CHECK: lzdr %f4
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; CHECK: blah %f4
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; CHECK: ldr %f0, %f4
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; CHECK: br %r14
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%ret = call double asm "blah $0", "={f4},0" (double 0.0)
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ret double %ret
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}
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; Test i128 FPRs.
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define void @f5(fp128 *%dest) {
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; CHECK-LABEL: f5:
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; CHECK: lzxr %f4
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; CHECK: blah %f4
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; CHECK-DAG: std %f4, 0(%r2)
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; CHECK-DAG: std %f6, 8(%r2)
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; CHECK: br %r14
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%ret = call fp128 asm "blah $0", "={f4},0" (fp128 0xL00000000000000000000000000000000)
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store fp128 %ret, fp128 *%dest
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ret void
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}
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; Test clobbers of GPRs and CC.
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define i32 @f6(i32 %in) {
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; CHECK-LABEL: f6:
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; CHECK: lr [[REG:%r[01345]]], %r2
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; CHECK: blah
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; CHECK: lr %r2, [[REG]]
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; CHECK: br %r14
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call void asm sideeffect "blah", "~{r2},~{cc}"()
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ret i32 %in
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}
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; Test clobbers of FPRs and CC.
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define float @f7(float %in) {
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; CHECK-LABEL: f7:
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; CHECK: ler [[REG:%f[1-7]]], %f0
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; CHECK: blah
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; CHECK: ler %f0, [[REG]]
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; CHECK: br %r14
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call void asm sideeffect "blah", "~{f0},~{cc}"()
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ret float %in
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}
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; Test that both registers in a GR128 pair get hoisted.
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define void @f8(i32 %count) {
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; CHECK-LABEL: f8
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; CHECK-DAG: lhi %r0, 0
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; CHECK-DAG: lhi %r1, 1
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; CHECK: %loop
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; CHECK-NOT: %r
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; CHECK: blah %r0, %r1
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; CHECK: br %r14
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entry:
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br label %loop
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loop:
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%this = phi i32 [ %count, %entry ], [ %next, %loop ]
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call void asm sideeffect "blah $0, $1", "{r0},{r1}" (i32 0, i32 1)
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%next = sub i32 %this, 1
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%cmp = icmp ne i32 %next, 0
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br i1 %cmp, label %loop, label %exit
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exit:
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ret void
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}
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