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llvm-mirror/test/MC/AArch64/elf-globaladdress.ll
Rafael Espindola 518baef93e Update tests to not be as dependent on section numbers.
Many of these predate llvm-readobj. With elf-dump we had to match
a relocation to symbol number and symbol number to symbol name or
section number.

llvm-svn: 235015
2015-04-15 15:59:37 +00:00

63 lines
1.9 KiB
LLVM

;; RUN: llc -mtriple=aarch64-none-linux-gnu -filetype=obj %s -o - | \
;; RUN: llvm-readobj -h -r | FileCheck -check-prefix=OBJ %s
; Also take it on a round-trip through llvm-mc to stretch assembly-parsing's legs:
;; RUN: llc -mtriple=aarch64-none-linux-gnu %s -o - | \
;; RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj -o - | \
;; RUN: llvm-readobj -h -r | FileCheck -check-prefix=OBJ %s
@var8 = global i8 0
@var16 = global i16 0
@var32 = global i32 0
@var64 = global i64 0
define void @loadstore() {
%val8 = load i8, i8* @var8
store volatile i8 %val8, i8* @var8
%val16 = load i16, i16* @var16
store volatile i16 %val16, i16* @var16
%val32 = load i32, i32* @var32
store volatile i32 %val32, i32* @var32
%val64 = load i64, i64* @var64
store volatile i64 %val64, i64* @var64
ret void
}
@globaddr = global i64* null
define void @address() {
store i64* @var64, i64** @globaddr
ret void
}
; Check we're using EM_AARCH64
; OBJ: ElfHeader {
; OBJ: Machine: EM_AARCH64
; OBJ: }
; OBJ: Relocations [
; OBJ: Section {{.*}} .rela.text {
; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var8
; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST8_ABS_LO12_NC var8
; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var16
; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST16_ABS_LO12_NC var16
; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var32
; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST32_ABS_LO12_NC var32
; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
; This is on the store, so not really important, but it stops the next
; match working.
; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
; Pure address-calculation against var64
; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC var64
; OBJ: }
; OBJ: ]