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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/CodeGen
Anton Korobeynikov 04878d43e1 Add testcase for PR5703
llvm-svn: 91931
2009-12-22 22:37:23 +00:00
..
Alpha
ARM Handle ARM inline asm "w" constraints with 64-bit ("d") registers. 2009-12-18 01:03:29 +00:00
Blackfin
CBackend
CellSPU Revert this dag combine change: 2009-12-17 00:40:05 +00:00
CPP
Generic While this test is testing a problem in the generic part of codegen, 2009-11-27 16:04:14 +00:00
Mips Support PIC loading of constant pool entries 2009-11-25 12:17:58 +00:00
MSP430 Add testcase for PR5703 2009-12-22 22:37:23 +00:00
PIC16 While converting one of the operands to a memory operand, we need to check if it is Legal and does not result into a cyclic dep. 2009-12-22 14:25:37 +00:00
PowerPC Do better with physical reg operands (typically, from inline asm) 2009-12-16 00:29:41 +00:00
SPARC
SystemZ
Thumb Add test case for the phi reuse patch. 2009-12-18 00:11:44 +00:00
Thumb2 Make this test pass on Linux. 2009-12-16 07:35:25 +00:00
X86 Remove target attribute break-sse-dep. Instead, do not fold load into sse partial update instructions unless optimizing for size. 2009-12-22 17:47:23 +00:00
XCore Add XCore support for indirectbr / blockaddress. 2009-11-18 23:20:42 +00:00