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https://github.com/RPCS3/llvm-mirror.git
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7ed143a4a1
Printing floating point number in decimal is inconvenient for humans. Verbose asm output will print out floating point values in comments, it helps. But in lots of cases, users still need additional work to covert the decimal back to hex or binary to check the bit patterns, especially when there are small precision difference. Hexadecimal form is one of the supported form in LLVM IR, and easier for debugging. This patch try to print all FP constant in hex form instead. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D73566
155 lines
3.5 KiB
LLVM
155 lines
3.5 KiB
LLVM
; RUN: llc -relocation-model=pic -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec -mattr=-vsx < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le-unknown-linux-gnu"
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@g = common global ppc_fp128 0xM00000000000000000000000000000000, align 16
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define void @callee(ppc_fp128 %x) {
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entry:
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%x.addr = alloca ppc_fp128, align 16
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store ppc_fp128 %x, ppc_fp128* %x.addr, align 16
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%0 = load ppc_fp128, ppc_fp128* %x.addr, align 16
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store ppc_fp128 %0, ppc_fp128* @g, align 16
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ret void
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}
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; CHECK: @callee
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; CHECK: ld [[REG:[0-9]+]], .LC
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; CHECK: stfd 2, 8([[REG]])
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; CHECK: stfd 1, 0([[REG]])
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; CHECK: blr
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define void @caller() {
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entry:
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%0 = load ppc_fp128, ppc_fp128* @g, align 16
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call void @test(ppc_fp128 %0)
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ret void
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}
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; CHECK: @caller
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; CHECK: ld [[REG:[0-9]+]], .LC
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; CHECK: lfd 2, 8([[REG]])
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; CHECK: lfd 1, 0([[REG]])
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; CHECK: bl test
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declare void @test(ppc_fp128)
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define void @caller_const() {
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entry:
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call void @test(ppc_fp128 0xM3FF00000000000000000000000000000)
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ret void
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}
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; CHECK: .LCPI[[LC:[0-9]+]]_0:
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; CHECK: .long 0x3f800000
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; CHECK: .LCPI[[LC]]_1:
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; CHECK: .long 0
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; CHECK: @caller_const
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; CHECK: addis [[REG0:[0-9]+]], 2, .LCPI[[LC]]_0@toc@ha
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; CHECK: addis [[REG1:[0-9]+]], 2, .LCPI[[LC]]_1@toc@ha
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; CHECK: lfs 1, .LCPI[[LC]]_0@toc@l([[REG0]])
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; CHECK: lfs 2, .LCPI[[LC]]_1@toc@l([[REG1]])
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; CHECK: bl test
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define ppc_fp128 @result() {
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entry:
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%0 = load ppc_fp128, ppc_fp128* @g, align 16
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ret ppc_fp128 %0
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}
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; CHECK: @result
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; CHECK: ld [[REG:[0-9]+]], .LC
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; CHECK: lfd 1, 0([[REG]])
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; CHECK: lfd 2, 8([[REG]])
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; CHECK: blr
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define void @use_result() {
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entry:
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%call = tail call ppc_fp128 @test_result() #3
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store ppc_fp128 %call, ppc_fp128* @g, align 16
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ret void
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}
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; CHECK: @use_result
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; CHECK: bl test_result
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; CHECK: ld [[REG:[0-9]+]], .LC
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; CHECK: stfd 2, 8([[REG]])
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; CHECK: stfd 1, 0([[REG]])
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; CHECK: blr
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declare ppc_fp128 @test_result()
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define void @caller_result() {
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entry:
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%call = tail call ppc_fp128 @test_result()
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tail call void @test(ppc_fp128 %call)
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ret void
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}
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; CHECK: @caller_result
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; CHECK: bl test_result
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; CHECK-NEXT: nop
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; CHECK-NEXT: bl test
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; CHECK-NEXT: nop
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define i128 @convert_from(ppc_fp128 %x) {
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entry:
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%0 = bitcast ppc_fp128 %x to i128
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ret i128 %0
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}
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; CHECK: @convert_from
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; CHECK: stfd 1, [[OFF1:.*]](1)
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; CHECK: stfd 2, [[OFF2:.*]](1)
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; CHECK: ld 3, [[OFF1]](1)
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; CHECK: ld 4, [[OFF2]](1)
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; CHECK: blr
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define ppc_fp128 @convert_to(i128 %x) {
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entry:
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%0 = bitcast i128 %x to ppc_fp128
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ret ppc_fp128 %0
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}
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; CHECK: convert_to:
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; CHECK-DAG: std 3, [[OFF1:.*]](1)
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; CHECK-DAG: std 4, [[OFF2:.*]](1)
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; CHECK: lfd 1, [[OFF1]](1)
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; CHECK: lfd 2, [[OFF2]](1)
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; CHECK: blr
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define ppc_fp128 @convert_to2(i128 %x) {
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entry:
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%shl = shl i128 %x, 1
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%0 = bitcast i128 %shl to ppc_fp128
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ret ppc_fp128 %0
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}
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; CHECK: convert_to2:
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; CHECK: std 3, [[OFF1:.*]](1)
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; CHECK: std 5, [[OFF2:.*]](1)
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; CHECK: lfd 1, [[OFF1]](1)
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; CHECK: lfd 2, [[OFF2]](1)
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; CHECK: blr
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define double @convert_vector(<4 x i32> %x) {
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entry:
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%cast = bitcast <4 x i32> %x to ppc_fp128
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%conv = fptrunc ppc_fp128 %cast to double
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ret double %conv
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}
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; CHECK: @convert_vector
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; CHECK: addi [[REG:[0-9]+]], 1, [[OFF:.*]]
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; CHECK: stvx 2, 0, [[REG]]
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; CHECK: lfd 1, [[OFF]](1)
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; CHECK: blr
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declare void @llvm.va_start(i8*)
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define double @vararg(i32 %a, ...) {
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entry:
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%va = alloca i8*, align 8
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%va1 = bitcast i8** %va to i8*
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call void @llvm.va_start(i8* %va1)
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%arg = va_arg i8** %va, ppc_fp128
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%conv = fptrunc ppc_fp128 %arg to double
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ret double %conv
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}
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; CHECK: @vararg
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; CHECK: lfd 1, 0({{[0-9]+}})
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; CHECK: blr
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