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llvm-mirror/test/MC/VE/SMIR.s
Kazushi (Jam) Marukawa 10c96ad267 [VE] Support control instructions in MC layer 
Summary:
Add regression tests of asmparser, mccodeemitter, and disassembler for
control instructions.  Add not defined LPM/SPM/LFR/SFR/SMIR/NOP/LCR/
SCR/TSCR/FIDCR control isntructions newly.  Define MISC registers which
SMIR instruction reads and IC register which SIC instruction reads.
Change asmparser to support Zero, UImm3, and UImm6 operands and MISC
registers.  Change instprinter to support MISC registers also.
Change to use auto to receive dyn_cast also.

Differential Revision: https://reviews.llvm.org/D81370
2020-06-08 11:41:57 +02:00

189 lines
5.5 KiB
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# RUN: llvm-mc -triple=ve --show-encoding < %s \
# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
# RUN: | FileCheck %s --check-prefixes=CHECK-INST
# CHECK-INST: smir %s11, %usrcc
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x00,0x0b,0x22]
smir %s11, 0
# CHECK-INST: smir %s11, %usrcc
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x00,0x0b,0x22]
smir %s11, %usrcc
# CHECK-INST: smir %s11, %psw
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x01,0x0b,0x22]
smir %s11, 1
# CHECK-INST: smir %s11, %psw
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x01,0x0b,0x22]
smir %s11, %psw
# CHECK-INST: smir %s11, %sar
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x02,0x0b,0x22]
smir %s11, 2
# CHECK-INST: smir %s11, %sar
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x02,0x0b,0x22]
smir %s11, %sar
# CHECK-INST: smir %s11, %pmmr
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x07,0x0b,0x22]
smir %s11, 7
# CHECK-INST: smir %s11, %pmmr
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x07,0x0b,0x22]
smir %s11, %pmmr
# CHECK-INST: smir %s11, %pmcr0
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x08,0x0b,0x22]
smir %s11, 8
# CHECK-INST: smir %s11, %pmcr0
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x08,0x0b,0x22]
smir %s11, %pmcr0
# CHECK-INST: smir %s11, %pmcr1
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x09,0x0b,0x22]
smir %s11, 9
# CHECK-INST: smir %s11, %pmcr1
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x09,0x0b,0x22]
smir %s11, %pmcr1
# CHECK-INST: smir %s11, %pmcr2
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x0a,0x0b,0x22]
smir %s11, 10
# CHECK-INST: smir %s11, %pmcr2
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x0a,0x0b,0x22]
smir %s11, %pmcr2
# CHECK-INST: smir %s11, %pmcr3
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x0b,0x0b,0x22]
smir %s11, 11
# CHECK-INST: smir %s11, %pmcr3
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x0b,0x0b,0x22]
smir %s11, %pmcr3
# CHECK-INST: smir %s11, %pmc0
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x10,0x0b,0x22]
smir %s11, 16
# CHECK-INST: smir %s11, %pmc0
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x10,0x0b,0x22]
smir %s11, %pmc0
# CHECK-INST: smir %s11, %pmc1
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x11,0x0b,0x22]
smir %s11, 17
# CHECK-INST: smir %s11, %pmc1
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x11,0x0b,0x22]
smir %s11, %pmc1
# CHECK-INST: smir %s11, %pmc2
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x12,0x0b,0x22]
smir %s11, 18
# CHECK-INST: smir %s11, %pmc2
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x12,0x0b,0x22]
smir %s11, %pmc2
# CHECK-INST: smir %s11, %pmc3
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x13,0x0b,0x22]
smir %s11, 19
# CHECK-INST: smir %s11, %pmc3
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x13,0x0b,0x22]
smir %s11, %pmc3
# CHECK-INST: smir %s11, %pmc4
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x14,0x0b,0x22]
smir %s11, 20
# CHECK-INST: smir %s11, %pmc4
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x14,0x0b,0x22]
smir %s11, %pmc4
# CHECK-INST: smir %s11, %pmc5
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x15,0x0b,0x22]
smir %s11, 21
# CHECK-INST: smir %s11, %pmc5
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x15,0x0b,0x22]
smir %s11, %pmc5
# CHECK-INST: smir %s11, %pmc6
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x16,0x0b,0x22]
smir %s11, 22
# CHECK-INST: smir %s11, %pmc6
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x16,0x0b,0x22]
smir %s11, %pmc6
# CHECK-INST: smir %s11, %pmc7
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x17,0x0b,0x22]
smir %s11, 23
# CHECK-INST: smir %s11, %pmc7
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x17,0x0b,0x22]
smir %s11, %pmc7
# CHECK-INST: smir %s11, %pmc8
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x18,0x0b,0x22]
smir %s11, 24
# CHECK-INST: smir %s11, %pmc8
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x18,0x0b,0x22]
smir %s11, %pmc8
# CHECK-INST: smir %s11, %pmc9
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x19,0x0b,0x22]
smir %s11, 25
# CHECK-INST: smir %s11, %pmc9
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x19,0x0b,0x22]
smir %s11, %pmc9
# CHECK-INST: smir %s11, %pmc10
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x1a,0x0b,0x22]
smir %s11, 26
# CHECK-INST: smir %s11, %pmc10
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x1a,0x0b,0x22]
smir %s11, %pmc10
# CHECK-INST: smir %s11, %pmc11
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x1b,0x0b,0x22]
smir %s11, 27
# CHECK-INST: smir %s11, %pmc11
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x1b,0x0b,0x22]
smir %s11, %pmc11
# CHECK-INST: smir %s11, %pmc12
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x1c,0x0b,0x22]
smir %s11, 28
# CHECK-INST: smir %s11, %pmc12
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x1c,0x0b,0x22]
smir %s11, %pmc12
# CHECK-INST: smir %s11, %pmc13
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x1d,0x0b,0x22]
smir %s11, 29
# CHECK-INST: smir %s11, %pmc13
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x1d,0x0b,0x22]
smir %s11, %pmc13
# CHECK-INST: smir %s11, %pmc14
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x1e,0x0b,0x22]
smir %s11, 30
# CHECK-INST: smir %s11, %pmc14
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x1e,0x0b,0x22]
smir %s11, %pmc14
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