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282 lines
11 KiB
C++
282 lines
11 KiB
C++
//==--- llvm/CodeGen/ReachingDefAnalysis.h - Reaching Def Analysis -*- C++ -*---==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file Reaching Defs Analysis pass.
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///
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/// This pass tracks for each instruction what is the "closest" reaching def of
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/// a given register. It is used by BreakFalseDeps (for clearance calculation)
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/// and ExecutionDomainFix (for arbitrating conflicting domains).
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///
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/// Note that this is different from the usual definition notion of liveness.
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/// The CPU doesn't care whether or not we consider a register killed.
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///
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_REACHINGDEFANALYSIS_H
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#define LLVM_CODEGEN_REACHINGDEFANALYSIS_H
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/TinyPtrVector.h"
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#include "llvm/CodeGen/LoopTraversal.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/InitializePasses.h"
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namespace llvm {
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class MachineBasicBlock;
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class MachineInstr;
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/// Thin wrapper around "int" used to store reaching definitions,
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/// using an encoding that makes it compatible with TinyPtrVector.
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/// The 0th LSB is forced zero (and will be used for pointer union tagging),
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/// The 1st LSB is forced one (to make sure the value is non-zero).
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class ReachingDef {
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uintptr_t Encoded;
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friend struct PointerLikeTypeTraits<ReachingDef>;
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explicit ReachingDef(uintptr_t Encoded) : Encoded(Encoded) {}
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public:
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ReachingDef(std::nullptr_t) : Encoded(0) {}
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ReachingDef(int Instr) : Encoded(((uintptr_t) Instr << 2) | 2) {}
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operator int() const { return ((int) Encoded) >> 2; }
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};
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template<>
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struct PointerLikeTypeTraits<ReachingDef> {
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static constexpr int NumLowBitsAvailable = 1;
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static inline void *getAsVoidPointer(const ReachingDef &RD) {
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return reinterpret_cast<void *>(RD.Encoded);
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}
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static inline ReachingDef getFromVoidPointer(void *P) {
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return ReachingDef(reinterpret_cast<uintptr_t>(P));
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}
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static inline ReachingDef getFromVoidPointer(const void *P) {
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return ReachingDef(reinterpret_cast<uintptr_t>(P));
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}
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};
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/// This class provides the reaching def analysis.
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class ReachingDefAnalysis : public MachineFunctionPass {
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private:
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MachineFunction *MF;
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const TargetRegisterInfo *TRI;
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LoopTraversal::TraversalOrder TraversedMBBOrder;
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unsigned NumRegUnits;
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/// Instruction that defined each register, relative to the beginning of the
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/// current basic block. When a LiveRegsDefInfo is used to represent a
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/// live-out register, this value is relative to the end of the basic block,
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/// so it will be a negative number.
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using LiveRegsDefInfo = std::vector<int>;
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LiveRegsDefInfo LiveRegs;
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/// Keeps clearance information for all registers. Note that this
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/// is different from the usual definition notion of liveness. The CPU
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/// doesn't care whether or not we consider a register killed.
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using OutRegsInfoMap = SmallVector<LiveRegsDefInfo, 4>;
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OutRegsInfoMap MBBOutRegsInfos;
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/// Current instruction number.
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/// The first instruction in each basic block is 0.
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int CurInstr;
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/// Maps instructions to their instruction Ids, relative to the beginning of
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/// their basic blocks.
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DenseMap<MachineInstr *, int> InstIds;
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/// All reaching defs of a given RegUnit for a given MBB.
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using MBBRegUnitDefs = TinyPtrVector<ReachingDef>;
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/// All reaching defs of all reg units for a given MBB
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using MBBDefsInfo = std::vector<MBBRegUnitDefs>;
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/// All reaching defs of all reg units for a all MBBs
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using MBBReachingDefsInfo = SmallVector<MBBDefsInfo, 4>;
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MBBReachingDefsInfo MBBReachingDefs;
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/// Default values are 'nothing happened a long time ago'.
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const int ReachingDefDefaultVal = -(1 << 20);
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using InstSet = SmallPtrSetImpl<MachineInstr*>;
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using BlockSet = SmallPtrSetImpl<MachineBasicBlock*>;
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public:
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static char ID; // Pass identification, replacement for typeid
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ReachingDefAnalysis() : MachineFunctionPass(ID) {
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initializeReachingDefAnalysisPass(*PassRegistry::getPassRegistry());
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}
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void releaseMemory() override;
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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MachineFunctionProperties getRequiredProperties() const override {
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return MachineFunctionProperties().set(
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MachineFunctionProperties::Property::NoVRegs).set(
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MachineFunctionProperties::Property::TracksLiveness);
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}
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/// Re-run the analysis.
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void reset();
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/// Initialize data structures.
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void init();
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/// Traverse the machine function, mapping definitions.
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void traverse();
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/// Provides the instruction id of the closest reaching def instruction of
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/// PhysReg that reaches MI, relative to the begining of MI's basic block.
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int getReachingDef(MachineInstr *MI, MCRegister PhysReg) const;
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/// Return whether A and B use the same def of PhysReg.
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bool hasSameReachingDef(MachineInstr *A, MachineInstr *B,
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MCRegister PhysReg) const;
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/// Return whether the reaching def for MI also is live out of its parent
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/// block.
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bool isReachingDefLiveOut(MachineInstr *MI, MCRegister PhysReg) const;
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/// Return the local MI that produces the live out value for PhysReg, or
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/// nullptr for a non-live out or non-local def.
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MachineInstr *getLocalLiveOutMIDef(MachineBasicBlock *MBB,
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MCRegister PhysReg) const;
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/// If a single MachineInstr creates the reaching definition, then return it.
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/// Otherwise return null.
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MachineInstr *getUniqueReachingMIDef(MachineInstr *MI,
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MCRegister PhysReg) const;
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/// If a single MachineInstr creates the reaching definition, for MIs operand
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/// at Idx, then return it. Otherwise return null.
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MachineInstr *getMIOperand(MachineInstr *MI, unsigned Idx) const;
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/// If a single MachineInstr creates the reaching definition, for MIs MO,
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/// then return it. Otherwise return null.
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MachineInstr *getMIOperand(MachineInstr *MI, MachineOperand &MO) const;
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/// Provide whether the register has been defined in the same basic block as,
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/// and before, MI.
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bool hasLocalDefBefore(MachineInstr *MI, MCRegister PhysReg) const;
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/// Return whether the given register is used after MI, whether it's a local
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/// use or a live out.
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bool isRegUsedAfter(MachineInstr *MI, MCRegister PhysReg) const;
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/// Return whether the given register is defined after MI.
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bool isRegDefinedAfter(MachineInstr *MI, MCRegister PhysReg) const;
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/// Provides the clearance - the number of instructions since the closest
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/// reaching def instuction of PhysReg that reaches MI.
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int getClearance(MachineInstr *MI, MCRegister PhysReg) const;
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/// Provides the uses, in the same block as MI, of register that MI defines.
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/// This does not consider live-outs.
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void getReachingLocalUses(MachineInstr *MI, MCRegister PhysReg,
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InstSet &Uses) const;
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/// Search MBB for a definition of PhysReg and insert it into Defs. If no
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/// definition is found, recursively search the predecessor blocks for them.
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void getLiveOuts(MachineBasicBlock *MBB, MCRegister PhysReg, InstSet &Defs,
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BlockSet &VisitedBBs) const;
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void getLiveOuts(MachineBasicBlock *MBB, MCRegister PhysReg,
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InstSet &Defs) const;
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/// For the given block, collect the instructions that use the live-in
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/// value of the provided register. Return whether the value is still
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/// live on exit.
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bool getLiveInUses(MachineBasicBlock *MBB, MCRegister PhysReg,
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InstSet &Uses) const;
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/// Collect the users of the value stored in PhysReg, which is defined
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/// by MI.
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void getGlobalUses(MachineInstr *MI, MCRegister PhysReg, InstSet &Uses) const;
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/// Collect all possible definitions of the value stored in PhysReg, which is
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/// used by MI.
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void getGlobalReachingDefs(MachineInstr *MI, MCRegister PhysReg,
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InstSet &Defs) const;
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/// Return whether From can be moved forwards to just before To.
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bool isSafeToMoveForwards(MachineInstr *From, MachineInstr *To) const;
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/// Return whether From can be moved backwards to just after To.
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bool isSafeToMoveBackwards(MachineInstr *From, MachineInstr *To) const;
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/// Assuming MI is dead, recursively search the incoming operands which are
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/// killed by MI and collect those that would become dead.
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void collectKilledOperands(MachineInstr *MI, InstSet &Dead) const;
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/// Return whether removing this instruction will have no effect on the
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/// program, returning the redundant use-def chain.
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bool isSafeToRemove(MachineInstr *MI, InstSet &ToRemove) const;
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/// Return whether removing this instruction will have no effect on the
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/// program, ignoring the possible effects on some instructions, returning
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/// the redundant use-def chain.
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bool isSafeToRemove(MachineInstr *MI, InstSet &ToRemove,
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InstSet &Ignore) const;
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/// Return whether a MachineInstr could be inserted at MI and safely define
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/// the given register without affecting the program.
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bool isSafeToDefRegAt(MachineInstr *MI, MCRegister PhysReg) const;
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/// Return whether a MachineInstr could be inserted at MI and safely define
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/// the given register without affecting the program, ignoring any effects
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/// on the provided instructions.
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bool isSafeToDefRegAt(MachineInstr *MI, MCRegister PhysReg,
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InstSet &Ignore) const;
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private:
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/// Set up LiveRegs by merging predecessor live-out values.
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void enterBasicBlock(MachineBasicBlock *MBB);
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/// Update live-out values.
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void leaveBasicBlock(MachineBasicBlock *MBB);
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/// Process he given basic block.
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void processBasicBlock(const LoopTraversal::TraversedMBBInfo &TraversedMBB);
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/// Process block that is part of a loop again.
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void reprocessBasicBlock(MachineBasicBlock *MBB);
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/// Update def-ages for registers defined by MI.
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/// Also break dependencies on partial defs and undef uses.
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void processDefs(MachineInstr *);
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/// Utility function for isSafeToMoveForwards/Backwards.
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template<typename Iterator>
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bool isSafeToMove(MachineInstr *From, MachineInstr *To) const;
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/// Return whether removing this instruction will have no effect on the
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/// program, ignoring the possible effects on some instructions, returning
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/// the redundant use-def chain.
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bool isSafeToRemove(MachineInstr *MI, InstSet &Visited,
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InstSet &ToRemove, InstSet &Ignore) const;
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/// Provides the MI, from the given block, corresponding to the Id or a
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/// nullptr if the id does not refer to the block.
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MachineInstr *getInstFromId(MachineBasicBlock *MBB, int InstId) const;
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/// Provides the instruction of the closest reaching def instruction of
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/// PhysReg that reaches MI, relative to the begining of MI's basic block.
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MachineInstr *getReachingLocalMIDef(MachineInstr *MI,
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MCRegister PhysReg) const;
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};
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} // namespace llvm
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#endif // LLVM_CODEGEN_REACHINGDEFANALYSIS_H
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