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13d15dbc40
Move the register stackification and coloring passes to run very late, after PEI, tail duplication, and most other passes. This means that all code emitted and expanded by those passes is now exposed to these passes. This also eliminates the need for prologue/epilogue code to be manually stackified, which significantly simplifies the code. This does require running LiveIntervals a second time. It's useful to think of these late passes not as late optimization passes, but as a domain-specific compression algorithm based on knowledge of liveness information. It's used to compress the code after all conventional optimizations are complete, which is why it uses LiveIntervals at a phase when actual optimization passes don't typically need it. Differential Revision: http://reviews.llvm.org/D20075 llvm-svn: 269012
114 lines
3.8 KiB
C++
114 lines
3.8 KiB
C++
//===-- WebAssemblyRegNumbering.cpp - Register Numbering ------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief This file implements a pass which assigns WebAssembly register
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/// numbers for CodeGen virtual registers.
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///
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//===----------------------------------------------------------------------===//
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#include "WebAssembly.h"
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblySubtarget.h"
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#include "llvm/ADT/SCCIterator.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm-reg-numbering"
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namespace {
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class WebAssemblyRegNumbering final : public MachineFunctionPass {
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const char *getPassName() const override {
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return "WebAssembly Register Numbering";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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public:
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static char ID; // Pass identification, replacement for typeid
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WebAssemblyRegNumbering() : MachineFunctionPass(ID) {}
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};
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} // end anonymous namespace
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char WebAssemblyRegNumbering::ID = 0;
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FunctionPass *llvm::createWebAssemblyRegNumbering() {
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return new WebAssemblyRegNumbering();
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}
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bool WebAssemblyRegNumbering::runOnMachineFunction(MachineFunction &MF) {
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DEBUG(dbgs() << "********** Register Numbering **********\n"
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"********** Function: "
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<< MF.getName() << '\n');
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WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
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MachineRegisterInfo &MRI = MF.getRegInfo();
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MFI.initWARegs();
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// WebAssembly argument registers are in the same index space as local
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// variables. Assign the numbers for them first.
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MachineBasicBlock &EntryMBB = MF.front();
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for (MachineInstr &MI : EntryMBB) {
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switch (MI.getOpcode()) {
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case WebAssembly::ARGUMENT_I32:
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case WebAssembly::ARGUMENT_I64:
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case WebAssembly::ARGUMENT_F32:
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case WebAssembly::ARGUMENT_F64: {
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int64_t Imm = MI.getOperand(1).getImm();
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DEBUG(dbgs() << "Arg VReg " << MI.getOperand(0).getReg() << " -> WAReg "
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<< Imm << "\n");
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MFI.setWAReg(MI.getOperand(0).getReg(), Imm);
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break;
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}
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default:
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break;
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}
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}
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// Then assign regular WebAssembly registers for all remaining used
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// virtual registers. TODO: Consider sorting the registers by frequency of
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// use, to maximize usage of small immediate fields.
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unsigned NumVRegs = MF.getRegInfo().getNumVirtRegs();
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unsigned NumStackRegs = 0;
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// Start the numbering for locals after the arg regs
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unsigned CurReg = MFI.getParams().size();
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for (unsigned VRegIdx = 0; VRegIdx < NumVRegs; ++VRegIdx) {
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unsigned VReg = TargetRegisterInfo::index2VirtReg(VRegIdx);
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// Skip unused registers.
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if (MRI.use_empty(VReg))
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continue;
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// Handle stackified registers.
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if (MFI.isVRegStackified(VReg)) {
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DEBUG(dbgs() << "VReg " << VReg << " -> WAReg "
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<< (INT32_MIN | NumStackRegs) << "\n");
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MFI.setWAReg(VReg, INT32_MIN | NumStackRegs++);
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continue;
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}
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if (MFI.getWAReg(VReg) == WebAssemblyFunctionInfo::UnusedReg) {
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DEBUG(dbgs() << "VReg " << VReg << " -> WAReg " << CurReg << "\n");
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MFI.setWAReg(VReg, CurReg++);
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}
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}
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return true;
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}
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