1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 21:13:02 +02:00
llvm-mirror/lib/Target/AArch64/MCTargetDesc
Joel Jones ac916443ad [AArch64] ILP32 Backend Relocation Support
Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 and
  TLSDESC_ADD_LO12 relocations
Rearrange ordering in AArch64.def to follow relocation encoding
Fix name:
  R_AARCH64_P32_LD64_GOT_LO12_NC => R_AARCH64_P32_LD32_GOT_LO12_NC
Add support for several "TLS", "TLSGD", and "TLSLD" relocations for
  ILP32
Fix return values from isNonILP32reloc
Add implementations for
  R_AARCH64_ADR_PREL_PG_HI21_NC, R_AARCH64_P32_LD32_GOT_LO12_NC,
  R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC,
  R_AARCH64_P32_TLSDESC_LD32_LO12, R_AARCH64_LD64_GOT_LO12_NC,
  *TLSLD_LDST128_DTPREL_LO12, *TLSLD_LDST128_DTPREL_LO12_NC,
  *TLSLE_LDST128_TPREL_LO12, *TLSLE_LDST128_TPREL_LO12_NC
Modify error messages to give name of equivalent relocation in the
  ABI not being used, along with better checking for non-existent
  requested relocations.
Added assembler support for "pg_hi21_nc"
Relocation definitions added without implementations:
  R_AARCH64_P32_TLSDESC_ADR_PREL21, R_AARCH64_P32_TLSGD_ADR_PREL21,
  R_AARCH64_P32_TLSGD_ADD_LO12_NC, R_AARCH64_P32_TLSLD_ADR_PREL21, 
  R_AARCH64_P32_TLSLD_ADR_PAGE21, R_AARCH64_P32_TLSLD_ADD_LO12_NC,
  R_AARCH64_P32_TLSLD_LD_PREL19, R_AARCH64_P32_TLSDESC_LD_PREL19,
  R_AARCH64_P32_TLSGD_ADR_PAGE21, R_AARCH64_P32_TLS_DTPREL,
  R_AARCH64_P32_TLS_DTPMOD, R_AARCH64_P32_TLS_TPREL,
  R_AARCH64_P32_TLSDESC
Fix encoding:
  R_AARCH64_P32_TLSDESC_ADR_PAGE21

Reviewers: Peter Smith

Patch by: Joel Jones (jjones@cavium.com)

Differential Revision: https://reviews.llvm.org/D32072

llvm-svn: 301980
2017-05-02 22:01:48 +00:00
..
AArch64AddressingModes.h
AArch64AsmBackend.cpp Add MCContext argument to MCAsmBackend::applyFixup for error reporting 2017-04-05 10:16:14 +00:00
AArch64ELFObjectWriter.cpp [AArch64] ILP32 Backend Relocation Support 2017-05-02 22:01:48 +00:00
AArch64ELFStreamer.cpp This patch closes PR#32216: Better testing of schedule model instruction latencies/throughputs. 2017-04-14 07:44:23 +00:00
AArch64ELFStreamer.h
AArch64FixupKinds.h
AArch64MachObjectWriter.cpp [AArch64] Fix some Include What You Use warnings; other minor fixes (NFC). 2017-02-03 21:49:13 +00:00
AArch64MCAsmInfo.cpp Distinguish between code pointer size and DataLayout::getPointerSize() in DWARF info generation 2017-04-17 17:41:25 +00:00
AArch64MCAsmInfo.h
AArch64MCCodeEmitter.cpp AArch64: lower "fence singlethread" to a pure compiler barrier. 2017-04-20 21:57:45 +00:00
AArch64MCExpr.cpp [AArch64] ILP32 Backend Relocation Support 2017-05-02 22:01:48 +00:00
AArch64MCExpr.h [AArch64] ILP32 Backend Relocation Support 2017-05-02 22:01:48 +00:00
AArch64MCTargetDesc.cpp [AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsia 2017-04-04 19:51:53 +00:00
AArch64MCTargetDesc.h AArch64 ILP32 relocations for assembly and ELF 2016-10-24 13:37:13 +00:00
AArch64TargetStreamer.cpp [AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-01-06 00:30:53 +00:00
AArch64TargetStreamer.h
CMakeLists.txt
LLVMBuild.txt